VLSI Design, Automation and Test(VLSI-DAT)最新文献

A low-noise high-efficient buck converter with noise-shaping technique 采用噪声整形技术的低噪声高效降压变换器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114515

Jiann-Jong Chen, P. Wu, Ta-Wei Chao, Y. Ku, Yuh-Shyan Hwang, Cheng-Chieh Yu

引用次数: 0

Biomedical devices and instruments for point-of-care diagnosis 即时诊断用生物医学设备和仪器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114544

Y. Lo

{"title":"Biomedical devices and instruments for point-of-care diagnosis","authors":"Y. Lo","doi":"10.1109/VLSI-DAT.2015.7114544","DOIUrl":"https://doi.org/10.1109/VLSI-DAT.2015.7114544","url":null,"abstract":"With an aging population, the cost of health care has increased substantially over the years. Today nearly 3 trillion dollars are spent in the United States each year, and it is imperative that we keep the climbing health care expense under control while raising the quality and efficiency of the health care. Point of care is a promising path to meet such goals because it promises timely, personal, and cost effective diagnosis and treatments with improved patient outcomes. However, most of today's point-of-care devices have traded quality and performance for cost and speed. As a result, the clinical utility of today's point-of-care devices has been seriously limited. In this presentation, we will discuss the challenges and potential solutions for new generation biomedical devices and systems for point-of-care applications. These devices will be built upon a lab-on-a-chip platform that integrates many technologies including microfluidics, photonics, nanotechnologies, and electronics. They will also leverage from the prevailing mobile devices for enhanced portability, connectivity, and usability. A few examples of such point-of-care devices for disease diagnosis and health monitoring will be discussed.","PeriodicalId":369130,"journal":{"name":"VLSI Design, Automation and Test(VLSI-DAT)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114901713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 1 Mb/s–40 Mb/s human body channel communication transceiver 一个1mb /s - 40mb /s人体通道通信收发器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114536

Ching-Che Chung, Chi-Tung Chang, Chih-Yu Lin

引用次数: 10

Full-custom all-digital phase locked loop for clock generation 用于时钟生成的全定制全数字锁相环

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114567

Mu-lee Huang, C. Hung

引用次数: 1

Automated design space exploration of transient fault detectable datapath based on user specified power and delay constraints 基于用户指定功率和延迟约束的暂态故障检测数据路径的自动设计空间探索

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114570

A. Sengupta, Saumya Bhadauria

{"title":"Automated design space exploration of transient fault detectable datapath based on user specified power and delay constraints","authors":"A. Sengupta, Saumya Bhadauria","doi":"10.1109/VLSI-DAT.2015.7114570","DOIUrl":"https://doi.org/10.1109/VLSI-DAT.2015.7114570","url":null,"abstract":"A novel automated design space exploration (DSE) approach of multi-cycle transient fault detectable datapath based on multi-objective user constraints (power and delay) during high level synthesis (HLS) is presented in this paper. To the best of the authors' knowledge, this is the first work in the literature to solve this problem. The presented approach, driven by bacterial foraging optimization (BFO) algorithm provides easy flexibility to change direction in the design space through tumble/swim actions if a search path is found ineffective. The approach is highly capable of reaching true Pareto optimal region indicated by the closeness of our non-dominated solutions to the true Pareto front and their uniform spreading over the Pareto curve (implying diversity). The contributions of this paper are as follows: a) novel exploration approach for generating high quality transient fault detectable structure based on user provided requirements of power-delay, which is capable of transient error detection; b) novel fault detectable algorithm for handling single and multi-cycle transient faults. The results of the proposed approach indicated an average improvement in Quality of Results (QoR) of >9% and reduction in hardware usage of > 26 % compared to recent approaches that are closer in solving a similar objective.","PeriodicalId":369130,"journal":{"name":"VLSI Design, Automation and Test(VLSI-DAT)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131433411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

An effective photoplethysmography signal processing system based on EEMD method 一种有效的基于EEMD方法的光容积脉搏波信号处理系统

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114498

Jia-Ju Liao, Shang-Yi Chuang, Chia-Ching Chou, Chia-Chi Chang, W. Fang

引用次数: 4

A 127 fJ/conv. continuous-time delta-sigma modulator with a DWA-embedded two-step time-domain quantizer A 127 fJ/conv。连续时间delta-sigma调制器，嵌入了dwa两步时域量化器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114517

Chan-Hsiang Weng, Tzu-An Wei, Tsung-Hsien Lin

引用次数: 0

Lifetime-aware LRU promotion policy for last-level cache 最后一级缓存的生命周期感知LRU提升策略

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114579

Hong-Yi Wu, Chien-Chih Chen, Hsiang-Jen Tsai, Yin-Chi Peng, Tien-Fu Chen

引用次数: 2

Low power algorithm-architecture co-design of fast Independent Component Analysis (FICA) for multi-gas sensor applications 面向多气体传感器应用的快速独立分量分析(FICA)低功耗算法体系结构协同设计

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114512

Chih-Chao Yang, Po-Tsang Huang, Chun-Ying Huang, C. Chuang, W. Hwang

引用次数: 0

A configurable wavelet processor for biomedical applications 用于生物医学应用的可配置小波处理器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI: 10.1109/VLSI-DAT.2015.7114539

Wei-Lung Yang, Hsi-Pin Ma

引用次数: 5