采用噪声整形技术的低噪声高效降压变换器

VLSI Design, Automation and Test(VLSI-DAT) Pub Date : 2015-04-27 DOI:10.1109/VLSI-DAT.2015.7114515

Jiann-Jong Chen, P. Wu, Ta-Wei Chao, Y. Ku, Yuh-Shyan Hwang, Cheng-Chieh Yu

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引用次数: 0

摘要

本文设计了一种降压变换器，采用噪声整形技术来降低噪声，并采用同步整流来提高功率效率。测量结果表明，在2MHz时，输出电压在1.8V ~ 2.5V之间，负载电流在50mA ~ 200mA之间，峰值噪声水平小于-84.5dBm，功率效率为85% ~ 93.5%。降压变换器采用台积电0.35μm CMOS DPQM工艺制造。芯片面积为1.417mm*1.239 mm。

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A low-noise high-efficient buck converter with noise-shaping technique

In this paper, a buck converter is designed with a noise-shaping technique to reduce noise and uses synchronous rectification to increase power efficiency. The measured results show the peak noise level less than -84.5dBm at 2MHz and achieve 85% to 93.5% power efficiency with output voltage between 1.8V to 2.5V and a load current range from 50mA to 200mA. The buck converter is fabricated with TSMC 0.35μm CMOS DPQM process. The chip area is 1.417mm*1.239 mm.

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VLSI Design, Automation and Test(VLSI-DAT)

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