2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献_第10页

NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving NAIS:神经网络架构与实现搜索及其在自动驾驶中的应用

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942055

Cong Hao, Yao Chen, Xinheng Liu, A. Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-mei W. Hwu, Junli Gu, Deming Chen

{"title":"NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving","authors":"Cong Hao, Yao Chen, Xinheng Liu, A. Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-mei W. Hwu, Junli Gu, Deming Chen","doi":"10.1109/iccad45719.2019.8942055","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942055","url":null,"abstract":"The rapidly growing demands for powerful AI algorithms in many application domains have motivated massive investment in both high-quality deep neural network (DNN) models and high-efficiency implementations. In this position paper, we argue that a simultaneous DNN/implementation co-design methodology, named Neural Architecture and Implementation Search (NAIS), deserves more research attention to boost the development productivity and efficiency of both DNN models and implementation optimization. We propose a stylized design methodology that can drastically cut down the search cost while preserving the quality of the end solution. As an illustration, we discuss this DNN/implementation methodology in the context of both FPGAs and GPUs. We take autonomous driving as a key use case as it is one of the most demanding areas for high quality AI algorithms and accelerators. We discuss how such a co-design methodology can impact the autonomous driving industry significantly. We identify several research opportunities in this exciting domain.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125506887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

Verifying Conformance of Neural Network Models: Invited Paper 验证神经网络模型的一致性:特邀论文

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942151

M. Narasimhamurthy, Taisa Kushner, Souradeep Dutta, S. Sankaranarayanan

{"title":"Verifying Conformance of Neural Network Models: Invited Paper","authors":"M. Narasimhamurthy, Taisa Kushner, Souradeep Dutta, S. Sankaranarayanan","doi":"10.1109/iccad45719.2019.8942151","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942151","url":null,"abstract":"Neural networks are increasingly used as data-driven models for a wide variety of physical systems such as ground vehicles, airplanes, human physiology and automobile engines. These models are in-turn used for designing and verifying autonomous systems. The advantages of using neural networks include the ability to capture characteristics of particular systems using the available data. This is particularly advantageous for medical systems, wherein the data collected from individuals can be used to design devices that are well-adapted to a particular individual's unique physiological characteristics. At the same time, neural network models remain opaque: their structure makes them hard to understand and interpret by human developers. One key challenge lies in checking that neural network models of processes are “conformant” to the well established scientific (physical, chemical and biological) laws that underlie these models. In this paper, we will show how conformance often fails in models that are otherwise accurate and trained using the best practices in machine learning, with potentially serious consequences. We motivate the need for learning and verifying key conformance properties in data-driven models of the human insulin-glucose system and data-driven automobile models. We survey verification approaches for neural networks that can hold the key to learning and verifying conformance.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124699217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

ReDRAM: A Reconfigurable Processing-in-DRAM Platform for Accelerating Bulk Bit-Wise Operations ReDRAM:加速批量位操作的可重构处理平台

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942101

Shaahin Angizi, Deliang Fan

{"title":"ReDRAM: A Reconfigurable Processing-in-DRAM Platform for Accelerating Bulk Bit-Wise Operations","authors":"Shaahin Angizi, Deliang Fan","doi":"10.1109/iccad45719.2019.8942101","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942101","url":null,"abstract":"In this paper, we propose ReDRAM, as a reconfigurable DRAM-based processing-in-memory (PIM) accelerator, which transforms current DRAM architecture to massively parallel computational units exploiting the high internal bandwidth of modern memory chips. ReDRAM uses the analog operation of DRAM sub-arrays and elevates it to implement a full set of 1- and 2-input bulk bit-wise operations (NOT, (N)AND, (N)OR, and even X(N)OR) between operands stored in the same bit-line, based on a new dual-row activation mechanism with a modest change to peripheral circuits such sense amplifiers. ReDRAM can be leveraged to greatly reduce energy consumption and latency of complex in-DRAM logic computations relying on state-of-the-art mechanisms based on triple-row activation, dual-contact cells, row initialization, NOR style, etc. The extensive circuit-architecture simulations show that ReDRAM achieves on average 54× and 7.1× higher throughput for performing bulk bit-wise operations compared with CPU and GPU, respectively. Besides, ReDRAM outperforms recent processing-in-DRAM platforms with up to 3.7× better performance.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114411423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 34

Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory 通过干扰引起的错误和3D闪存上的循环编程实现瞬时消毒

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942084

Wei-Chen Wang, P. Lin, Yung-Chun Li, Chien-Chung Ho, Yu-Ming Chang, Yuan-Hao Chang

{"title":"Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory","authors":"Wei-Chen Wang, P. Lin, Yung-Chun Li, Chien-Chung Ho, Yu-Ming Chang, Yuan-Hao Chang","doi":"10.1109/iccad45719.2019.8942084","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942084","url":null,"abstract":"As data security has become one of the most crucial issues in modern storage system/application designs, the data sanitization techniques are regarded as the promising solution on 3D NAND flash-memory-based devices. Many excellent works had been proposed to exploit the in-place reprogramming, erasure and encryption techniques to achieve and implement the sanitization functionalities. However, existing sanitization approaches could lead to performance, disturbance overheads or even deciphered issues. Different from existing works, this work aims at exploring an instantaneous data sanitization scheme by taking advantage of programming disturbance properties. Our proposed design can not only achieve the instantaneous data sanitization by exploiting programming disturbance and error correction code properly, but also enhance the performance with the recycling programming design. The feasibility and capability of our proposed design are evaluated by a series of experiments on 3D NAND flash memory chips, for which we have very encouraging results. The experiment results show that the proposed design could achieve the instantaneous data sanitization with low overhead; besides, it improves the average response time and reduces the number of block erase count by up to 86.8% and 88.8%, respectively.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132536750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Endurance Enhancement of Multi-Level Cell Phase Change Memory 多层细胞相变记忆的持久增强

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942175

Cheong-Yeop Lee, Youngsoo Song, Youngsoo Shin

引用次数: 1

Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning 利用机器学习减少商用FPGA仿真系统的编译工作量

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942091

Anthony Agnesina, E. Lepercq, J. Escobedo, S. Lim

引用次数: 1

Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration 离心机:使用fpga加速评估全系统hls生成的异质加速器soc

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942048

Qijing Huang, Christopher Yarp, S. Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, K. Asanović, J. Wawrzynek

{"title":"Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration","authors":"Qijing Huang, Christopher Yarp, S. Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, K. Asanović, J. Wawrzynek","doi":"10.1109/iccad45719.2019.8942048","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942048","url":null,"abstract":"To overcome the end of traditional scaling, modern SoC systems consist of general-purpose compute augmented with large numbers of specialized accelerators. However, building and evaluating these systems is extremely expensive and time-consuming, even in early stages of development. While high-level modeling and back-of-the-envelope calculations can provide early insights into a new system, there are key effects that only manifest at the full-system level. However, full-system design has traditionally required writing RTL or developing complex software models for the entire design. In this paper, we describe a methodology and implement an open-source flow (“Centrifuge”) that can rapidly generate and evaluate heterogeneous SoCs by combining an HLS toolchain with the open-source FireSim FPGA-accelerated simulation platform. Our system can quickly produce complete SoC systems with many integrated HLS-generated accelerators as specified by the user, simulate them quickly and cycle-accurately on FPGAs, and run complete software stacks on top, including booting Linux and running full application frameworks. Our system allows users to easily explore a variety of accelerator integration techniques, by automatically integrating accelerators in several ways—as tightly coupled RoCC accelerators, as accelerators that communicate over the standard on-chip network, and lastly as “disaggregated” accelerators that are directly attached to an Ethernet network between SoCs. By integrating these tools, our methodology allows users to rapidly generate an entire hardware/software stack for a customized SoC that can be fabricated as an ASIC and evaluate its end-to-end performance using cycle-exact FPGA simulation, allowing for agile design-space exploration of novel accelerator-based systems.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124943731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

DEEPEYE: A Deeply Tensor-Compressed Neural Network Hardware Accelerator: Invited Paper 深度张量压缩神经网络硬件加速器

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942052

Yuan Cheng, Guangya Li, Ngai Wong, Hai-Bao Chen, Hao Yu

引用次数: 5

The Internet of Microfluidic Things: Perspectives on System Architecture and Design Challenges: Invited Paper 微流体物联网:系统架构和设计挑战的视角:特邀论文

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942080

Mohamed Ibrahim, M. Gorlatova, K. Chakrabarty

{"title":"The Internet of Microfluidic Things: Perspectives on System Architecture and Design Challenges: Invited Paper","authors":"Mohamed Ibrahim, M. Gorlatova, K. Chakrabarty","doi":"10.1109/iccad45719.2019.8942080","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942080","url":null,"abstract":"The integration of microfluidics and biosensor technology is transforming microbiology research by providing new capabilities for clinical diagnostics, cancer research, and pharmacology studies. This integration enables new approaches for biochemistry automation and cyber-physical adaptation. Similarly, recent years have witnessed the rapid growth of the Internet of Things (IoT) paradigm, where different types of real-world elements such as wearable sensors are connected and allowed to autonomously interact with each other. Combining the advances of both cyber-physical microfluidics and IoT domains can generate new opportunities for knowledge fusion by transforming distributed local microfluidic elements into a global network of coordinated microfluidic systems. This paper aims to streamline this transformation and it presents a research vision for enabling the Internet of Microfluidic Things (IoMT). To leverage advances in connected Microfluidic Things, we highlight new perspectives on system architecture, and describe technical challenges related to design automation, temporal flexibility, security, and service assignment. This vision is supported by case studies from cancer research and pharmacology studies to explain the significance of the proposed framework.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114505528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper 云柱:无障碍设计自动化平台的生产和灵感:邀请论文

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2019-11-01 DOI: 10.1109/iccad45719.2019.8942104

Tsun-Ming Tseng, Mengchu Li, Yushen Zhang, Tsung-Yi Ho, Ulf Schlichtmann

{"title":"Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper","authors":"Tsun-Ming Tseng, Mengchu Li, Yushen Zhang, Tsung-Yi Ho, Ulf Schlichtmann","doi":"10.1109/iccad45719.2019.8942104","DOIUrl":"https://doi.org/10.1109/iccad45719.2019.8942104","url":null,"abstract":"Design automation for continuous-flow microfluidic large-scale integration (mLSI) biochips has made remarkable progress over the past few years. Nowadays a biochip containing up to hundreds of components can be automatically synthesized within a few minutes. However, the current advanced design automation tools are mostly developed for research use, which focus essentially on the algorithmic performance but overlook the accessibility. Therefore, we have started the Cloud Columba project since 2017 to provide users from different backgrounds with easy access to the state-of-the-art design automation approaches. Without being limited by the computing power of their end devices, users just need to formulate their design requests in a high abstraction level, based on which the cloud server will automatically synthesize a customized manufacturing-ready biochip design, which can be viewed and stored using simply a web browser. With the computer-synthesized designs, Cloud Columba supports application developers to explore a wider range of possibilities, and algorithm developers to validate and improve their ideas based on a practical foundation.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122466260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5