2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)最新文献_第9页

Evaluation of Piezoresistive Polymer-based Traces for Non-invasive Sensor Patch 非侵入式传感器贴片的压阻聚合物痕迹评价

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654338

Ramona B. Damalerio, Ruiqi Lim, Weiguo Chen, D. Choong, Ming-Yuan Cheng

{"title":"Evaluation of Piezoresistive Polymer-based Traces for Non-invasive Sensor Patch","authors":"Ramona B. Damalerio, Ruiqi Lim, Weiguo Chen, D. Choong, Ming-Yuan Cheng","doi":"10.1109/EPTC.2018.8654338","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654338","url":null,"abstract":"In this paper, we shall discuss the suitable alternative material to gold for creating traces or electrodes of a noninvasive flexible sensor patch that is used for detecting early extravasation during intravenous cannulation. The samples were prepared by printing $5 mu mathrm{m} -$ to $10 mu mathrm{m} -$ thin piezoresistive polymer-based Carbon paste on a base polymer patch, also called the adhesive film. The first samples have the traces embedded in between two base adhesive films. The sensitivity of the samples was characterized by using a pressure chamber/jig with 4 cm hole to mimic an extravasation by bump formation when pumped with compressed dry air (CDA) that is connected to a 15 psi source. The sensitivity value obtained was 20% up to 23% at 0.16 psi. After optimization of the curing temperature of the adhesive film and piezoresistive polymer-based Carbon traces, ex-vivo test was conducted with the prototype sample placed on the cannulation site of a pork front hock. At 2 ml and 5 ml infused fluid, the sensitivity obtained is only 1.1% and 2.44%, respectively. The overall prototype dimension of all samples is 6 × 7 cm2. The second samples were prepared with narrower trace width and spacing than the first samples. Sensitivity obtained from the second sample at 0.16 psi increased to 50% up to 79%. The third samples were prepared with the same narrow trace with as the second sample, but this time the piezoresistive polymer-based traces were not embedded in two adhesive films, making the sample a single layer patch only. Sensitivity obtained at 0.16 psi increased further to 140% up to 200%. The 0.16 psi readout is based on previous data that at this pressure induced in the 4 mm hole where the adhesive film is placed over, it translates to 3mm bump height at 2ml infused volume on the skin. The results suggest a strong potential in the development of the piezoresistive polymer-based Carbon traces for flexible non-invasive sensor patch for early extravasation detection.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121931231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

K-band SATCOM Receiver Modules: System Design, Analysis and Test using the M3-Approach k波段卫星通信接收模块:采用m3方法的系统设计、分析和测试

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654359

C. Tschoban, B. Curran, J. Reyes, I. Ndip, Marco Rossi, K. Lang

引用次数: 1

Evaluation of Materials for Fan-Out Panel Level Packaging (FOPLP) Applications 扇出面板级封装(FOPLP)应用的材料评估

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654427

V. N. Sekhar, V. S. Rao, Kazunori Yamamoto, Tetsushi Fujinaga, Koichi Jono, H. Matsui, Takaya Yoshiteru, Horiguchi Yukio

{"title":"Evaluation of Materials for Fan-Out Panel Level Packaging (FOPLP) Applications","authors":"V. N. Sekhar, V. S. Rao, Kazunori Yamamoto, Tetsushi Fujinaga, Koichi Jono, H. Matsui, Takaya Yoshiteru, Horiguchi Yukio","doi":"10.1109/EPTC.2018.8654427","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654427","url":null,"abstract":"Present study focuses on lithography evaluation of dielectric and resist materials for panel level fan out fabrication. All experiments have been conducted on Gen 3 (550x650mm) size glass panels. Slit coating and Laser Direct Imaging (LDI) methods has been used for coating and exposure of dielectric and resist materials respectively. In this study, two positive tone photo definable polymer dielectric (PD) materials and one positive tone photo resist (PR) have been evaluated for process ability in terms of coating uniformity and pattern resolution capability. A special test structures lay out with different size vias and line traces of various Line Width/ Line Space (LW/LS) has been designed for these materials evaluation. Slit coating process was optimized and achieved target coating of $7 mu {mathrm{ m}}$ thick PR layer and $10 mu {mathrm{ m}}$ thick PD layer with TTV of 1% and 3% respectively. Extensive DOE has been carried out to optimize the LDI parameters like exposure dose, focus and laser power to identify optimum conditions for fine LW/LS patterns and smallest via openings on PR and PD layers respectively. Experiment results revealed that fine LW/LS of $2 mu {mathrm{ m}}/2 mu {mathrm{ m}}$ in $7 mu {mathrm{ m}}$ thick PR layer and smallest vias of $3 mu {mathrm{ m}}$ openings in $10 mu {mathrm{ m}}$ PD layers can be achieved using optimized LDI process. The detailed process parameters optimization and material evaluation results have been reported in the subsequent sessions of this paper.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130478750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Package Integrity and Reliability Effects of Mold Compound Chemistry for Power Device Application 动力器件用模具复合化学对封装完整性和可靠性的影响

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654298

April Joy H. Garete, Matthew M. Fernandez, Reinald John S. Roscain

{"title":"Package Integrity and Reliability Effects of Mold Compound Chemistry for Power Device Application","authors":"April Joy H. Garete, Matthew M. Fernandez, Reinald John S. Roscain","doi":"10.1109/EPTC.2018.8654298","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654298","url":null,"abstract":"Mold compound material plays an important role in the quality improvement and reliability performance of Power SO-8 packages. Different chemistries of epoxy-based mold compounds were successfully evaluated through material analysis, assembly performance, package delamination performance, and reliability performance. Material analysis through material characterizations, stress index calculation, and die stress simulation suggested that EMC-B has the lowest risk of package delamination and solder joint degradation due to its low stress properties. Package delamination and solder joint degradation performance proved that low stress mold compounds resulted to better mold adhesion and solder joint integrity than high stress mold compounds. EMC-B having the lowest stress induced on the die resulted to no delamination after assembly, minor delamination after thermal stress cycle and lowest solder joint degradation after thermal stress cycle. Rdson and dVsd performance after thermal stress cycle verified that solder joint degradation affects the thermal and electrical performance of the package. Overall, Power SO-8 package built using EMC-B resulted to good mold-to-die and mold-toclip adhesion, high solder joint integrity and stable thermal and electrical performance after thermal stress cycle.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"35 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113941447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Surface Planarization of Polymeric Interlayer Dielectrics for FOWLP Applications 用于FOWLP应用的聚合物层间介电体表面平面化

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654287

Soo-Geon Kang, Yejin Kim, Ayoung Moon, Sangwon Lee, S. Kim, Sungdong Kim

引用次数: 3

Dynamic Bending Reliability Analysis of Flexible Hybrid Integrated Chip-Foil Packages 柔性混合集成芯片箔封装的动态弯曲可靠性分析

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654334

N. Palavesam, E. Yacoub-George, W. Hell, C. Landesberger, C. Kutter, K. Bock

{"title":"Dynamic Bending Reliability Analysis of Flexible Hybrid Integrated Chip-Foil Packages","authors":"N. Palavesam, E. Yacoub-George, W. Hell, C. Landesberger, C. Kutter, K. Bock","doi":"10.1109/EPTC.2018.8654334","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654334","url":null,"abstract":"With the emergence of the Internet-of-Things (IoT) and wearable devices in the recent years, Flexible Hybrid Electronics (FHEs) has attracted significant attention. Chip-foil packages (also known as flexible interposers) fabricated by integrating ultra-thin silicon ICs onto or embedded into polymer foils comprising of metal interconnects (wiring lines, through hole via interconnects etc.) for powering up the system and transmission of data signals / IO commands are ideal candidates for FHE integration. The principal advantages of chip-foil packages over standard Surface Mount Device (SMD) components are their bend ability and conformability. However, the behavior of chip-foil packages under repeated bending must be analyzed in detail through extensive investigations to enable the transfer of the technology from research labs to industrial manufacturing platforms. Hence, we conducted two different types of bending tests to examine the repeated or dynamic bending reliability of the wiring lines and the via interconnects of the chip-foil packages. The experimental results highlight the need for design optimized dimensioning of the wiring lines and the via interconnects for manufacturing FHEs with high performance and good dynamic bending reliability. Such results complement the state-of-the-art information available regarding the electrical as well as mechanical reliability of chip-foil packages and are required as essential information for establishing guidelines for handling chip-foil packages during integration as well as for producing FHEs that are more reliable.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130998976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Electronic Packaging Solution for 300°C Ambience 300°C环境下的电子封装解决方案

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654295

V. Chidambaram, W. L. Ching

{"title":"Electronic Packaging Solution for 300°C Ambience","authors":"V. Chidambaram, W. L. Ching","doi":"10.1109/EPTC.2018.8654295","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654295","url":null,"abstract":"Niche applications in automobile and aerospace industries such as the management of integrity and operation based on the inputs from the network of sensors (e.g. pressure, accelerometer, vibration etc.) that are strategically located close to the high temperature area of the engine, requires reliable packaging solution for higher temperature regime around $300^{circ}mathrm{C}$. A unique test vehicle involving different packaging scenarios including multi-layered ceramic capacitor (MLCC), sensor device, passive component and a voltage regulator was designed and fabricated. Different types of wire bond materials, wire bond pad metallization, substrate metallization, die attach materials both conductive and non-conductive types, lid attach materials were investigated and the prospective candidates are recommended for $300^{circ}mathrm{C}$ ambience Key finding of this work are NiAuAg substrate metallization could cater for both Au and Al wire bonds. Ag sintering material is the best suited candidate for conductive die attach application, since it does not induce any thermal stresses to the components, unlike the hard solders counterpart like Au-Sn eutectic or Au-Ge eutectic. Hermeticity of the rugged package involving ceramic substrate is guaranteed by seam welding approach. Functionality of the ruggedized packages is confirmed by pre and post reliability electrical measurements. Reliability tests were carried out to confirm the selected bill of materials (BOM), function reliably at $300^{circ}mathrm{C}$ ambience.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131045118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effect of Electric Current on Constitutive Behaviour and Microstructure of SAC305 Solder Joint 电流对SAC305焊点本构性能及组织的影响

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654268

Wenbin Tang, X. Long, Yongchao Liu, C. Du, Yao Yao, Cheng Zhou, Yan-pei Wu, Fengrui Jia

{"title":"Effect of Electric Current on Constitutive Behaviour and Microstructure of SAC305 Solder Joint","authors":"Wenbin Tang, X. Long, Yongchao Liu, C. Du, Yao Yao, Cheng Zhou, Yan-pei Wu, Fengrui Jia","doi":"10.1109/EPTC.2018.8654268","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654268","url":null,"abstract":"As the traditional lead-containing solders were banned for consumer electronics by RoHS laws, lead-free solders are widely adopted in the electronics packaging industry. The Sn3.0Ag-0.5Cu (wt%, SAC305) solder material is one of the most commonly used die-attach solders. But the reliability of SAC305 solder joints under complex working conditions still requires to be carefully investigated. In this paper, the uniaxial tensile behavior of solder joint specimens with a diameter of 1.0 mm was investigated subjected to the strain rate of $10^{-4} mathrm{s}^{-1}$ under electric current density ranging from 1000 A/cm2 to 4000 A/cm2. In order to reveal the current stress effect under the mechanical-electrical coupled loadings, the uniaxial tensile properties of SAC305 solder joint specimens were measured by a multi-field loading system. In addition, the microstructure of the tensile specimens is observed by a scanning electron microscope. It was found that fracture mode changed from ductile fracture to the combination of brittle and ductile fracture when the current density raised from 1000A/cm2 to 2000A/cm2. And the fracture was more likely to happen near the interface when the current density is higher.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130620468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Highly Stretchable, Durable, and Printable Textile Conductor 高度可拉伸，耐用，可印刷的纺织导体

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654296

W. Lee, J. Y. Park, H. Nam, Sung‐Hoon Choa

引用次数: 2

Low Stress Solution of Anodic Bonding Technology with SW-YY® Glass for Sensitive MEMS SW-YY®玻璃用于敏感MEMS的阳极键合技术的低应力解决方案

2018 IEEE 20th Electronics Packaging Technology Conference (EPTC) Pub Date : 2018-12-01 DOI: 10.1109/EPTC.2018.8654362

Xiaodong Hu, P. Mackowiak, Manuel Baeuscher, Yucheng Zhang, Bei Wang, U. Hansen, S. Maus, O. Gyenge, O. Ehrmann, K. Lang, H. Ngo

{"title":"Low Stress Solution of Anodic Bonding Technology with SW-YY® Glass for Sensitive MEMS","authors":"Xiaodong Hu, P. Mackowiak, Manuel Baeuscher, Yucheng Zhang, Bei Wang, U. Hansen, S. Maus, O. Gyenge, O. Ehrmann, K. Lang, H. Ngo","doi":"10.1109/EPTC.2018.8654362","DOIUrl":"https://doi.org/10.1109/EPTC.2018.8654362","url":null,"abstract":"Anodic bonding technology is a well-established industrial technique, which is reported to be the most widely used MEMS packaging method. This Paper studies residual stress issue caused by different coefficients of thermal expansion (CTE) between silicon and glass during the anodic bonding process and its influence on MEMS-based sensors. For this purpose, SW-YY® Glass from ASAHI is selected. Firstly, the SW-YY® glass material is characterized in the bonding temperature range from 250°C to 500°C and voltage range from 400V-800V. Secondly, a MEMS based pressure sensor and two type glass substrates (SW-YY®, Pyrex®7740) were fabricated and bonded to evaluate the stress issue. Results show that the offset of the pressure sensor introduced by mismatched CTE was reduced significantly with SW-YY® glass than standard Pyrex® ®7740 glass. The proposed method can be used to reduce the influence of the internal stress caused with bonding temperature and the mismatched CTEs for stress sensitive MEMS.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114542619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1