The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory最新文献_第5页

Direct Sequence Spread Spectrum Simulation in a CDMA with the Conventional Sliding Correlator 基于传统滑动相关器的CDMA直接序列扩频仿真

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712355

G.G. Keller, M.A. Belkerdid

{"title":"Direct Sequence Spread Spectrum Simulation in a CDMA with the Conventional Sliding Correlator","authors":"G.G. Keller, M.A. Belkerdid","doi":"10.1109/SSST.1992.712355","DOIUrl":"https://doi.org/10.1109/SSST.1992.712355","url":null,"abstract":"A relatively new software package has emerged that facilitates the modeling of Direct Sequence Spread Spectrum (DSSS) systems. The Signal Processing Worksystem with Block Oriented Software Simulator (SPW/BOSS) by Comdisco [1] provides the flexibility of an open architecture and the strength of a vast component library. It was used extensively in this paper to generate models and simulate Code Division Multiple Access (CDMA) systems. The upcoming examples feature data sources and spreading mechanisms designed with individual Pseudo-Noise (PN) sequence generators with different polynomial orders, channels containing Additive White Gaussian Noise (AWGN), and receivers made up of Conventional Sliding Correlators (CSC) that are used as test beds to measure model integrity and performance trends. Contained within the CSC is a local PN generator with a sequence that matches the targeted transmitter, except for a possible phase shift. Further complexity is added to the models by studying the \"near-far\" problem associated with CDMA systems. These effects are simulated in software by altering the amplitudes of the transmitted signals. Simulation results are compared to analytical predications.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129950441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Gray code Design for N-Dimensional Signal Sets Using Genetic Algorithm & Binary Search Techniques 利用遗传算法和二分搜索技术设计n维信号集的灰度码

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712380

L. T. Lee, J. Foster

引用次数: 6

A Simulation-Based Method for Fault Tolerance Evaluation 一种基于仿真的容错评估方法

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712188

C. Scheper, R. Baker

{"title":"A Simulation-Based Method for Fault Tolerance Evaluation","authors":"C. Scheper, R. Baker","doi":"10.1109/SSST.1992.712188","DOIUrl":"https://doi.org/10.1109/SSST.1992.712188","url":null,"abstract":"Digital computing systems are used in many applications to perform functions whose correct execution is critical to the application, to the mission the application is a part of, or to human life and safety. This has led to an emphasis on the dependability of computing systems, i.e., whether or not justifiable reliance can be placed upon the service delivered by the system. There can be many factors defining dependability for a particular system, including performance, functionality, fidelity, reliability, maintainability, availability testability, fault tolerance, safety, security, and life-cycle cost. These factors interact with each other in ways that can be mutually diminishing and that can result in an undependable system. Therefore, a rigorous dependable system design validation and verification methodology is required. This paper addresses one of the necessary components of such a methodology for highly reliable systems: fault tolerance evaluation. We define fault tolerance evaluation to be those activities that assure that appropriate fault tolerance mechanisms are designed and implemented to provide the required level of system reliability, and propose an approach for using directed graph simulation models, behavioral simulation models, and semi-Markov analytic models during the early- to mid-stages of design for fault tolerance evaluation.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128905450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Extending a 0.35 NA h-Line Stepper to 0.8 Micrometer (1.6 Micrometer Pitch) CMOS Technology Using Halo LDD Devices and Trilayer Templates 使用Halo LDD器件和三层模板将0.35 NA h线步进扩展到0.8微米(1.6微米间距)CMOS技术

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712194

K. Markus, S. Goodwin-Johansson, W. B. Rogers, W.C. Donaldson

引用次数: 1

"Sense-able Structures" Optical Fiber Sensors for Smart Materials and Structures “可感知结构”用于智能材料和结构的光纤传感器

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712359

R. Claus, K. Murphy, M. S. Miller, B. Fogg, M. Gunther

引用次数: 1

System Implementation of a-16-Kbps Waveform Coder Using Adaptive Vector Quantization a- 16kbps波形编码器的自适应矢量量化系统实现

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712296

S. Ardalan, J. Foster, Tzung-Kwang Wang

引用次数: 1

A Class of Point Dissipative n-Dimensional Dynamical Systems 一类点耗散n维动力系统

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712166

A. Bose, A. Cover, J. Reneke

引用次数: 0

Finite Wall Thickness Effects on Currents Induced on Open Surface Scatterers 有限壁厚对开放表面散射体诱导电流的影响

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712201

R. Scharstein

引用次数: 0

Multivariable System Identification for Large Space Structures 大空间结构的多变量系统辨识

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712301

E. Medina, D. Irwin

引用次数: 0

Algorithm Development of 3-D Tracking System Using Utrasound Imaging 超声成像三维跟踪系统的算法开发

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI: 10.1109/SSST.1992.712343

T. F. Thomas, J. Foster

引用次数: 0