a- 16kbps波形编码器的自适应矢量量化系统实现

The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory Pub Date : 1992-03-01 DOI:10.1109/SSST.1992.712296

S. Ardalan, J. Foster, Tzung-Kwang Wang

{"title":"a- 16kbps波形编码器的自适应矢量量化系统实现","authors":"S. Ardalan, J. Foster, Tzung-Kwang Wang","doi":"10.1109/SSST.1992.712296","DOIUrl":null,"url":null,"abstract":"The research of this paper presents the development of an Adaptive Vector Quantizer (AVQ) CODEC chip using Open Architecture Silicon Implementation System (OASIS) tools. The goal of this effort is development of a 16-Kbps AVQ coder prototype system which can be used as an alternative to the currently used 32-Kbps Adaptive Delta Pulse Code Modulation (ADPCM). The AVQ semi-custom chip layout uses 1.2 micron SCMOS technology and consists of over 157,000 transistors. The AVQ system is being designed with Mentor Graphics tools and is a 4-layer PC board encompassing over 50 analog and digital components.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"System Implementation of a-16-Kbps Waveform Coder Using Adaptive Vector Quantization\",\"authors\":\"S. Ardalan, J. Foster, Tzung-Kwang Wang\",\"doi\":\"10.1109/SSST.1992.712296\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The research of this paper presents the development of an Adaptive Vector Quantizer (AVQ) CODEC chip using Open Architecture Silicon Implementation System (OASIS) tools. The goal of this effort is development of a 16-Kbps AVQ coder prototype system which can be used as an alternative to the currently used 32-Kbps Adaptive Delta Pulse Code Modulation (ADPCM). The AVQ semi-custom chip layout uses 1.2 micron SCMOS technology and consists of over 157,000 transistors. The AVQ system is being designed with Mentor Graphics tools and is a 4-layer PC board encompassing over 50 analog and digital components.\",\"PeriodicalId\":359363,\"journal\":{\"name\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSST.1992.712296\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSST.1992.712296","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

本文的研究是利用开放架构硅实现系统(OASIS)工具开发一种自适应矢量量化(AVQ)编解码器芯片。这项工作的目标是开发一个16kbps的AVQ编码器原型系统，可以作为目前使用的32kbps自适应增量脉冲编码调制(ADPCM)的替代方案。AVQ半定制芯片布局采用1.2微米SCMOS技术，由超过157,000个晶体管组成。AVQ系统是用Mentor Graphics工具设计的，是一个包含50多个模拟和数字组件的4层PC板。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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System Implementation of a-16-Kbps Waveform Coder Using Adaptive Vector Quantization

The research of this paper presents the development of an Adaptive Vector Quantizer (AVQ) CODEC chip using Open Architecture Silicon Implementation System (OASIS) tools. The goal of this effort is development of a 16-Kbps AVQ coder prototype system which can be used as an alternative to the currently used 32-Kbps Adaptive Delta Pulse Code Modulation (ADPCM). The AVQ semi-custom chip layout uses 1.2 micron SCMOS technology and consists of over 157,000 transistors. The AVQ system is being designed with Mentor Graphics tools and is a 4-layer PC board encompassing over 50 analog and digital components.

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The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory

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