1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon最新文献

Programmable neural logic 可编程神经逻辑

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1998-11-01 DOI: 10.1109/ICISS.1997.630242

V. Bohossian, P. Hasler, Jehoshua Bruck

引用次数: 14

Microfluidic MEMS for semiconductor processing 半导体加工用微流控MEMS

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1998-11-01 DOI: 10.1109/ICISS.1997.630279

A. Henning, J. Firch, James M. Harris, E. B. Dehan, Bradford A. Cozad, L. Christel, Y. Fathi, D. Hopkins, L. Lilly, Wendell Mcculley, W. Weber, M. Zdeblick

{"title":"Microfluidic MEMS for semiconductor processing","authors":"A. Henning, J. Firch, James M. Harris, E. B. Dehan, Bradford A. Cozad, L. Christel, Y. Fathi, D. Hopkins, L. Lilly, Wendell Mcculley, W. Weber, M. Zdeblick","doi":"10.1109/ICISS.1997.630279","DOIUrl":"https://doi.org/10.1109/ICISS.1997.630279","url":null,"abstract":"The advent of MEMS (microelectromechanical systems) will enable dramatic changes in MEMS-based devices offer opportunities to achieve higher with decreased size and increased reliability. In this work, we describe the achievement of several important devices for use in the semiconductor equipment industry. They include a low-flow mass flow controller, a high-precision pressure regulator, and an integrated gas panel. Compared to current technology, the devices are ultra-small in size, thus minimizing dead volumes and gas contact surface areas. With wettable surfaces comprised of ceramic and silicon (or, silicon coated with Si/sub 3/N/sub 4/ or SiC), they are resistant to corrosion, and generate virtually no particles. The devices are created from modular components. The science and technology of these components will be detailed. The modules examined are: normally-open proportional valves; normally-closed, low leak-rate shut-off valves; critical orifices (to extract information of flow rate); flow models (to extract flow rate from pressure and temperature information); silicon-based pressure sensors; and, the precision ceramic-based packages which integrate these modules into useful devices for semiconductor processing. The work finishes with a detailed description of the low-flow mass flow controller.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114662904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Design and characterization of next-generation micromirrors fabricated in a four-level, planarized surface-micromachined polycrystalline silicon process 新一代四能级、平面表面微加工多晶硅微镜的设计与表征

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630255

M. Michalicek, J. Comtois, C. C. Barren

{"title":"Design and characterization of next-generation micromirrors fabricated in a four-level, planarized surface-micromachined polycrystalline silicon process","authors":"M. Michalicek, J. Comtois, C. C. Barren","doi":"10.1109/ICISS.1997.630255","DOIUrl":"https://doi.org/10.1109/ICISS.1997.630255","url":null,"abstract":"This paper describes the design and characterization of several types of micromirror devices to include process capabilities, device modeling, and test data resulting in deflection versus applied potential curves. These micromirror devices are the first to be fabricated in the state-of-the-art four-level planarized polysilicon process available at Sandia National Laboratories known as the Sandia Ultra-planar Multi-level MEMS Technology (SUMMiT). This enabling process permits the development of micromirror devices with near-ideal characteristics which have previously been unrealizable in standard three-layer polysilicon processes. This paper describes such characteristics as elevated address electrodes, individual address wiring beneath the device, planarized mirror surfaces using Chemical Mechanical Polishing (CMP), unique post-process metallization, and the best active surface area to date. This paper presents the design, fabrication, modeling, and characterization of several variations of Flexure-Beam (FBMD) and Axial-Rotation Micromirror Devices (ARMD). The released devices are first metallized using a standard sputtering technique relying on metallization guards and masks that are fabricated next to the devices. Such guards are shown to enable the sharing of bond pads between numerous arrays of micromirrors in order to maximize the number of on-chip test arrays. The devices are modeled and then empirically characterized using a laser interferometer setup located at the Air Force Institute of Technology (AFIT) at Wright-Patterson AFB in Dayton, Ohio. Unique design considerations for these micromirror devices and the SUMMiT process are also discussed. The models are then compared with the empirical data to produce a complete characterization of the devices in a deflection versus applied potential curve.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123679485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

High bit-rate 10 channel optical transmitter for sub-system interconnection 用于子系统互连的高比特率10通道光发射机

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630263

L. Pesando, B. Bostica, M. Burzio, F. Delpiano, P. Pellegrino

{"title":"High bit-rate 10 channel optical transmitter for sub-system interconnection","authors":"L. Pesando, B. Bostica, M. Burzio, F. Delpiano, P. Pellegrino","doi":"10.1109/ICISS.1997.630263","DOIUrl":"https://doi.org/10.1109/ICISS.1997.630263","url":null,"abstract":"Parallel optical interconnections allow for a substantial improvement in the capacity of systems associating an high bit-rate for each channel with a consistent reduction in the number of cables needed for interconnecting different system parts, such as boards or cabinets. We constructed a 10 channel parallel optical transmitter with 12.5 Gbit/s total bit-rate. The silicon CMOS (Complementary Metal Oxide Semiconductor) laser driver Integrated Circuit (IC), completely designed in CSELT, allows for low power consumption and low-cost even at the high bit-rate achieved with this device. The module as a metal package pigtailed with a 50/125 mm fibre ribbon with standard MPO/sup TM//MTP/sup TM/ push-pull multifibre connector. The laser array is a low threshold edge emitting Fabry-Perot commercial device with /spl lambda/=1.3 /spl mu/m, which makes it suitable for the fibres used in the telecom networks. During thorough lab tests the module has been operated up to 1.25 Gbit/s/ch with a good performance in terms of BER (Bit Error Ratio) characteristic, better than 10/sup 14/, with a power budget of more than 10 dB and an overall power consumption of 1.3 W. The interconnection distance has been proven to be more than 500 m with a residual power margin of 4 dB with satisfactory BER figures.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"18 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116753228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Three-dimensional integration technology for real time micro-vision system 实时微视觉系统的三维集成技术

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630262

H. Kurino, T. Matsumoto, K. Yu, N. Miyakawa, H. Itani, H. Tsukamoto, M. Koyanagi

引用次数: 18

SRT interconnection network on 3D stacked implementation by considering thermo-radiation 考虑热辐射的SRT三维堆叠互连网络实现

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630245

Y. Inoguchi, T. Matsuzawa, S. Horiguchi

引用次数: 2

The power of dynamic reconfiguration 动态重构的力量

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630240

V. K. Prasanna

{"title":"The power of dynamic reconfiguration","authors":"V. K. Prasanna","doi":"10.1109/ICISS.1997.630240","DOIUrl":"https://doi.org/10.1109/ICISS.1997.630240","url":null,"abstract":"Summary form only given. Advances in semiconductor technology have led to many devices in which the computing devices can be configured as the computation proceeds. Field Programmable Gate Arrays is a typical commercially available configurable device. Such configurability offers several opportunities to speed-up computations. However, algorithmic innovations are needed to exploit such features to obtain fast parallel solutions. This talk will introduce and illustrate algorithmic configurable computing and contrast it with traditional approach based on logic synthesis. This talk will begin with the theoretical foundations of such computations by introducing the Reconfigurable Mesh model that was defined by USC researchers and others several years ago. Dynamic reconfiguration, in which the connections are changed as the computation proceeds is a powerful mechanism to achieve fast parallel solutions. We will illustrate the power of dynamic reconfiguration using this abstract model and show how scalable and portable solutions can be designed using currently available devices which offer limited configurability. These ideas will be illustrated by a number of examples from the USC MAARC project.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130174300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

VLSI architecture for an advance DS/CDMA wireless communication receiver 一种先进的DS/CDMA无线通信接收机的VLSI结构

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630266

Y. Lee, V. Jain

引用次数: 5

Silicon micromachined gas chromatography system 硅微机械气相色谱系统

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630252

E. Kolesar, R. Reston

{"title":"Silicon micromachined gas chromatography system","authors":"E. Kolesar, R. Reston","doi":"10.1109/ICISS.1997.630252","DOIUrl":"https://doi.org/10.1109/ICISS.1997.630252","url":null,"abstract":"A miniature gas chromatography (GC) system has been designed and fabricated using silicon micromachining and integrated circuit (IC) processing techniques. The silicon micromachined gas chromatography system (SMGCS) is composed of a miniature sample injector that incorporates a 10 /spl mu/l sample loop; a 0.9-m long, rectangular-shaped (300 /spl mu/m width and 10 /spl mu/m height) capillary column coated with a 0.2-/spl mu/m thick copper phthalocyanine (CuPc) stationary-phase; and a dual-detector scheme based upon a CuPc-coated chemiresistor and a commercially available, 125-/spl mu/m diameter thermal conductivity detector (TCD) bead. Silicon micromachining was employed to fabricate the interface between the sample injector and the GC column, the column itself, and the dual-detector cavity. A novel IC thin-film processing technique was developed to sublime the CuPc stationary-phase coating on the column walls that were micromachined in the host silicon wafer substrate and Pyrex cover plate, which were then electrostatically bonded together. The SMGCS can separate binary gas mixtures composed of parts per-million (ppm) concentrations of ammonia (NH/sub 3/) and nitrogen dioxide (NO/sub 2/) when isothermally operated (55-80/spl deg/C). With a helium carrier gas and nitrogen diluent, a 10 /spl mu/l sample volume containing ammonia and nitrogen dioxide injected at 40 psi (2.8/spl times/10/sup 5/ Pa) can be separated in less than 30 minutes.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124450228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

A 16 GHz fast RISC engine using GaAs/AlGaAs and SiGe HBT technology 采用GaAs/AlGaAs和SiGe HBT技术的16ghz快速RISC引擎

1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon Pub Date : 1997-10-08 DOI: 10.1109/ICISS.1997.630248

S. Steidl, S. Carlough, M. Ernest, A. Garg, R. Kraft, J. McDonald

引用次数: 1