{"title":"A 24GHz Pulse-Mode Transmitter for Short-Range Car Radar","authors":"Peng Zhao, H. Veenstra, J. Long","doi":"10.1109/RFIC.2007.380905","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380905","url":null,"abstract":"A pulse-mode transmitter with low carrier leakage for 24 GHz short-range car radar applications is described. A 12.5 dBm output power amplifier (continuous into 50 Omega), a pulse width and rate control circuit and a voltage reference circuit are included on the IC. The pulse-mode 24GHz output signal is modulated via the final stage bias current to achieve a RF carrier leakage of -50 dBm in the off-state. The power dissipation is 360 mW when RF is on, 117 mW when RF is off, resulting in a typical 122 mW dissipation in normal operation. The 1.2 times 0.87 mm2 IC operates from a 4.5 V supply and is fabricated in 0.25 mu m SiGe:C BiCMOS technology [1].","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122429766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. M. Cheema, R. Mahmoudi, M. Sanduleanu, Roermund van Ahm
{"title":"A Ka Band, Static, MCML Frequency Divider, in Standard 90nm-CMOS LP for 60 GHz Applications","authors":"H. M. Cheema, R. Mahmoudi, M. Sanduleanu, Roermund van Ahm","doi":"10.1109/RFIC.2007.380942","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380942","url":null,"abstract":"This paper presents a broadband, static, 2:1 frequency divider in a bulk 90 nm CMOS LP (low-power) technology with maximum operating frequency of 35.5 GHz. The divider exhibits an enhanced input sensitivity, below 0 dBm, over a broad input range of 31 GHz and consumes 24 mA from a 1.2 V supply. The phase noise of the divider is -124.6 dBc/Hz at 1 MHz offset from the carrier.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122492224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ultra Low-Capacitance Bond Pad for RF Applications in CMOS Technology","authors":"Yuan-Wen Hsiao, M. Ker","doi":"10.1109/RFIC.2007.380888","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380888","url":null,"abstract":"A low-capacitance bond pad for gigahertz RF applications is proposed. Three kinds of on-chip inductors embedded under the traditional bond pad are used to compensate bond-pad capacitance. Experimental results have verified that bond-pad capacitance can be significantly reduced in a specific frequency band due to the cancellation effect provided by the embedded inductor in the proposed bond pad. The proposed bond pad is fully compatible to general CMOS processes without any process modification.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131398685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Pruvost, L. Moquillon, E. Imbs, M. Marchetti, P. Garcia
{"title":"Low Noise Low Cost Rx Solutions for Pulsed 24GHz Automotive Radar Sensors","authors":"S. Pruvost, L. Moquillon, E. Imbs, M. Marchetti, P. Garcia","doi":"10.1109/RFIC.2007.380907","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380907","url":null,"abstract":"This work presents the performance of an integrated low noise amplifier (LNA) and Gilbert cell mixer integration and also a voltage controlled oscillator (VCO) performance. Differential topology was used to achieve the down converter. LNA measurements report 22.5 dB gain and about 3.2 dB noise figure at 24 GHz. Large signal results give IP1dB of -15 dBm. The mixer measurements show very interesting results of 15 dB conversion gain and 5 dBDSB noise figure. This allows a down converter of 31.8 dB gain and 3.5 dBDSB noise figure which provides a dynamic range of 37 dB. The design of these circuits was performed considering temperature and process variations. Nevertheless, results obtained at 24 GHz have never been published using a standard 0.17 mum BiCMOS SiGe 170 GHz fT featuring 1.7 V Bvceo.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128063446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Novel High-Q Inductor using Active Inductor Structure and Feedback Parallel Resonance Circuit","authors":"Sujin Seo, Nam-Sik Ryu, Heungjae Choi, Y. Jeong","doi":"10.1109/RFIC.2007.380925","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380925","url":null,"abstract":"This paper presents a novel high-Q inductor using conventional grounded active inductor and feedback parallel resonance circuit. The proposed high-Q inductor (HI) consists of the conventional active grounded inductor and feedback parallel resonance circuit which is composed of low-Q spiral inductor and capacitor. The novelty of the proposed structure is based on the increase of g-factor by feeding parallel resonance circuit into gyrator structure. The high-Q inductor is fabricated by 0.18 mum Hynix CMOS technology. The fabricated inductor shows inductance of above 45 nH and Q-factor of over 250 around 5 GHz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132616465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Unterweissacher, K. Mertens, T. Brandtner, W. Pribyl
{"title":"Stability Analysis of On-Chip Multi-Stage RF Power Amplifiers","authors":"M. Unterweissacher, K. Mertens, T. Brandtner, W. Pribyl","doi":"10.1109/RFIC.2007.380926","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380926","url":null,"abstract":"On-chip multi-stage wideband power amplifiers may show oscillations due to an unwanted feedback loop via the power distribution network. A fully differential CMOS amplifier with a bandwidth from 6 to 9 GHz that was expected to be sensitive to oscillations has been analyzed by utilizing a novel pre-layout method for estimating power grid parasitics including inductance effects. Sweeping the parameters of the power grid models enabled us to find a power grid that improved the stability of the power amplifier (PA).","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"12 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131866513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Jeon, I. Song, I. Kang, Yeonam Yun, Byung-Gook Park, J. Lee, Hyungcheol Shin
{"title":"A New Noise Parameter Model of Short-Channel MOSFETs","authors":"J. Jeon, I. Song, I. Kang, Yeonam Yun, Byung-Gook Park, J. Lee, Hyungcheol Shin","doi":"10.1109/RFIC.2007.380964","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380964","url":null,"abstract":"In this paper, a closed form expression for noise parameters of MOSFETs are derived from a more accurate small-signal equivalent circuit. The modeling results show a good agreement with the measured data. Based on the analysis of the noise coming from channel thermal noise and parasitic resistances, the noise contribution from each component is analyzed.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134338030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tuned LC Clock Buffers with Static Phase Adjust","authors":"V. Reddy, W. Titus, J. Kenney","doi":"10.1109/RFIC.2007.380937","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380937","url":null,"abstract":"An LC tank providing clock buffering for a half-rate binary phase detector in a clock and data recovery circuit is described. This paper analyzes the trade-offs involved in choosing the Q of the LC tank, presents an automatic tuning method for the LC tank and describes a method to program the phase of the clock relative to the input data using 2 LC tanks with mismatched center frequencies. This work is part of a transceiver chip for XFP fiber optic application fabricated in a 0.13 mum CMOS process.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123382415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"30 GHz CMOS Low Noise Amplifier","authors":"E. Adabi, B. Heydari, M. Bohsali, A. Niknejad","doi":"10.1109/RFIC.2007.380961","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380961","url":null,"abstract":"30 GHz low noise amplifier was designed and fabricated in a 90 nm digital CMOS process. The mm-wave amplifier has a peak gain of 20 dB at 28.5 GHz and a 3 dB bandwidth of 2.6 GHz with the input and output matching better than 12 dB and 17 dB over the entire band respectively. The NF is 2.9 dB at 28 GHz and less than 4.2 dB across the band and it can deliver 2 dBm of power to a matched load at its 1 dB compression point. The amplifier has a measured linearity of IIIP3=-7.5 dBm. It consumes 16.25 mW of power using a low supply voltage of 1 V and occupies an area (excluding the pads) of 1600 mum x 420 mum.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124736365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Afsahi, A. Behzad, S. Au, R. Roufoogaran, J. Rael
{"title":"An Area and Power Efficient Cartesian Phase Shifter + Mixer Circuit Applied to WLAN System","authors":"A. Afsahi, A. Behzad, S. Au, R. Roufoogaran, J. Rael","doi":"10.1109/RFIC.2007.380900","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380900","url":null,"abstract":"A two-antenna array receiver is designed for WLAN application to build a maximum ratio combiner (MRC) system. A new signal-path Cartesian phase generation and combination technique is proposed to shift the RF signal by 22.5 phase steps. The 3 dB improvement in received SNR is achieved in comparison to single path receiver. The 0.29 mm^2 RF paths consumes 30 mW in 0.13 mum CMOS process.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122775134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}