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2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)最新文献

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A feedforward linearization technique implemented in IF band for active down-conversion mixers 有源下变频混频器中频带前馈线性化技术的实现
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969076
Hao Li, Xiao Yang, C. Saavedra
{"title":"A feedforward linearization technique implemented in IF band for active down-conversion mixers","authors":"Hao Li, Xiao Yang, C. Saavedra","doi":"10.1109/RFIC.2017.7969076","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969076","url":null,"abstract":"A feedforward linearization technique to cancel the third-order intermodulation (IM3) of the down-conversion mixers is proposed, in which a low-frequency second-order intermodulation tone (IM2) is created and multiplied by the mixer's output to generate the IM3 tones for the cancellation. The proposed linearization technique is applied to an active mixer operating at 2 GHz. Fabricated in a 0.13-µm CMOS process and operated at 1.2 V supply, the mixer with a unit-gain IF amplifier in series delivers 8.5 dB gain and 2.5 dBm IIP3 without linearization. The linearization technique achieves 12-dB IIP3 improvement with negligible gain reduction, less than 0.2 dB of noise penalty and an extra current of 4.2 mA.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122398740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Accurate EM simulation of SMT components in RF designs 射频设计中SMT元件的精确电磁仿真
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969037
Weimin Sun
{"title":"Accurate EM simulation of SMT components in RF designs","authors":"Weimin Sun","doi":"10.1109/RFIC.2017.7969037","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969037","url":null,"abstract":"SMD is designed into many MCM/SiP products, but accurate EM simulation of SMD in a design has been a challenge. In fact, circuit simulation with an EM MCM model connected with vendor-provided SMT models often leads to a shift of harmonic trap notch. Such shift may be attributed to the intrinsic inductance of an EM port. In this paper, we focus on EM models of HFSS, present discovery of intrinsic port inductance in an HFSS model and discuss issues and techniques on how to handle lumped SMT ports in an HFSS EM model for more accurate SMD circuit simulation.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123560472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Low power wideband receiver with RF Self-Interference Cancellation for Full-Duplex and FDD wireless Diversity 全双工和FDD无线分集低功率宽带射频自干扰消除接收机
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969089
E. Kargaran, S. Tijani, G. Pini, D. Manstretta, R. Castello
{"title":"Low power wideband receiver with RF Self-Interference Cancellation for Full-Duplex and FDD wireless Diversity","authors":"E. Kargaran, S. Tijani, G. Pini, D. Manstretta, R. Castello","doi":"10.1109/RFIC.2017.7969089","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969089","url":null,"abstract":"Saw-Less Frequency Division Duplexing and Full-Duplex transceivers require very high receiver linearity. Self-Interference Cancellation can relax the specification but results in very high power. We propose a low-power direct-conversion single-ended receiver with passive SIC. A 28 nm CMOS prototype achieves an effective IIP3 > 25 dBm for both IB and OOB SI with only 20 dB cancellation and 25 dB isolation. Power consumption is 25mW, active area is 0.5 mm2.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115871768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
A 59-to-276 GHz CMOS signal generation for rotational spectroscopy 59至276 GHz CMOS信号生成旋转光谱
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969025
Xiaolong Liu, Y. Chao, H. Luong
{"title":"A 59-to-276 GHz CMOS signal generation for rotational spectroscopy","authors":"Xiaolong Liu, Y. Chao, H. Luong","doi":"10.1109/RFIC.2017.7969025","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969025","url":null,"abstract":"An ultra-wideband sub-THz signal generation system is proposed for rotational spectroscopy employing a magnetic-tuning varactor-less quad-band voltage-controlled oscillator (QB-VCO), a locking-range-enhanced dual-mode injection-locked frequency divider (DM-ILFD), a power-efficient injection-locked oscillator (ILO) as a driver, and sub-THz mixers with frequency multipliers for frequency extension. Implemented in a 65-nm CMOS process and consuming 54 mW, the prototype measures an ultra-wide frequency tuning range from 58.8 to 275.6 GHz with 10-MHz offset phase noise from −115.8 dBc/Hz to −89.2 dBc/Hz while occupying a core area of 0.9 mm × 0.72 mm.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131291436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A quad channel 11-bit 1 GS/s 40 mW Collaborative ADC based enabling digital beamforming for 5G wireless 基于四通道11位1 GS/s 40 mW协作ADC，支持5G无线数字波束成形
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969032
Aurangozeb, F. Aryanfar, Masum Hossain
{"title":"A quad channel 11-bit 1 GS/s 40 mW Collaborative ADC based enabling digital beamforming for 5G wireless","authors":"Aurangozeb, F. Aryanfar, Masum Hossain","doi":"10.1109/RFIC.2017.7969032","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969032","url":null,"abstract":"A 4×11-bit 1 GS/s 40 mW Collaborative ADC in 65nm CMOS is presented for a 4-Ch MIMO receiver. It utilizes the correlation information between channels to perform energy efficient digitization of received signals. By utilizing 8 SAR units each with 6-bit level of resolution, four level of ADC resolutions (11, 9, 6, and 6-bit), is achieved dynamically for optimal performance. This collaborative ADC in compare to all-11 and all-9 bit has an area and power reduction of 50% and 41% respectively with only 10% degradation in overall SNDR.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134350863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 0.05–6 GHz voltage-mode harmonic rejection mixer with up to 30 dBm in-band IIP3 and 35 dBc HRR in 32 nm SOI CMOS 一个0.05-6 GHz电压型谐波抑制混频器，带内IIP3高达30 dBm, HRR为35 dBc，采用32nm SOI CMOS
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969078
K. Kibaroglu, Gabriel M. Rebeiz
{"title":"A 0.05–6 GHz voltage-mode harmonic rejection mixer with up to 30 dBm in-band IIP3 and 35 dBc HRR in 32 nm SOI CMOS","authors":"K. Kibaroglu, Gabriel M. Rebeiz","doi":"10.1109/RFIC.2017.7969078","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969078","url":null,"abstract":"This paper presents a new harmonic rejection mixer (HRM) circuit that uses resistive scaling to achieve very high linearity and a harmonic rejection ratio (HRR) greater than 35 dBc. The mixer employs 4 double-balanced mixers driven by 8 LO phases with 12.5% duty cycle to isolate different paths. The mixer switches have been implemented with thin- and thick-oxide transistors to improve linearity further at the cost of reduced tuning range. The measured conversion loss at an IF of 100 MHz is 6.6–10.8 dB and 6.4–9.2 dB for an RF of 0.05–6 GHz and 0.05–4 GHz, and the measured in-band IIP3 is 23–19 dBm and 31–21 dBm. The power consumption is 29–126 and 98–298 mW for the thin-oxide and thick-oxide designs, respectively. To our knowledge, this is the highest linearity and widest tuning range reported to-date for a harmonic rejection mixer. Application areas are in high-linearity wideband receivers, and in base-station and instrumentation receivers with reduced front-end filtering requirements.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115399906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 10–40 GHz frequency quadrupler source with switchable bandpass filters and > 30 dBc harmonic rejection 一个10-40 GHz频率四倍器源，具有可切换带通滤波器和> 30 dBc谐波抑制
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969014
Hyunchul Chung, Q. Ma, Gabriel M. Rebeiz
{"title":"A 10–40 GHz frequency quadrupler source with switchable bandpass filters and > 30 dBc harmonic rejection","authors":"Hyunchul Chung, Q. Ma, Gabriel M. Rebeiz","doi":"10.1109/RFIC.2017.7969014","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969014","url":null,"abstract":"This paper presents a 10–40 GHz wideband frequency quadrupler in GF8HP 0.13 µm SiGe BiCMOS process. Three bands (low-, mid-, and high-band) are implemented on-chip for wideband operation. An on-chip 4-pole switchable elliptic bandpass filter is also used to result in greatly improved harmonic rejection ratio (HRR). The measured worstcase HRR is 32–48 dBc at 11–40 GHz with an output power of +1 to −8 dBm for Pin= 1 dBm (25–32 dB at 10–11 GHz). The output power and HRR remain nearly constant with Pin of 0–7 dBm. The chip is 3.96 mm2 and consumes 60 mW in low- and mid-band modes, and 84 mW for the high-band mode. To our knowledge, this wideband frequency quadrupler represents state-of-the-art performance in terms of bandwidth, HRR and Pout. Application areas are wideband low-harmonic content sources for wideband measurement systems, high-resolution imaging systems and digital beamforming phased-arrays.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"317 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116120631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
An 8-element common-mode-coupled 106 GHz fundamental oscillator with −111 dBc/Hz phase noise at 1 MHz offset 8元共模耦合106 GHz基频振荡器，相位噪声为- 111 dBc/Hz，偏移量为1mhz
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969039
A. Imani, H. Hashemi
{"title":"An 8-element common-mode-coupled 106 GHz fundamental oscillator with −111 dBc/Hz phase noise at 1 MHz offset","authors":"A. Imani, H. Hashemi","doi":"10.1109/RFIC.2017.7969039","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969039","url":null,"abstract":"Phase noise reduces in a coupled array of oscillators at an ideal rate of 3N dB for 2N oscillators. Concept of “common-mode coupling” is introduced as a robust technique in reducing phase noise in mm-wave frequencies. A 106 GHz 8-element common-mode coupled Colpitts oscillator is implemented in a 130 nm SiGe HBT BiCMOS technology with a measured phase noise of −111 dBc/Hz at 1 MHz offset while consuming 90 mW. The core differential Colpitts oscillator uses a resonant biasing scheme to reduce phase noise. The improvement of phase noise compared to the stand-alone oscillator is 9 dB showing the effectiveness of the proposed coupling scheme.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126316207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A subharmonically injection-locked PLL with 130 fs RMS jitter at 24 GHz using synchronous reference pulse injection from nonlinear VCO envelope feedback 利用非线性压控振荡器包络反馈的同步参考脉冲注入，在24 GHz频率下实现了一种具有130 fs RMS抖动的次谐波注入锁相环
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969027
Dongseok Shin, Shinwoong Park, S. Raman, Kwang-Jin Koh
{"title":"A subharmonically injection-locked PLL with 130 fs RMS jitter at 24 GHz using synchronous reference pulse injection from nonlinear VCO envelope feedback","authors":"Dongseok Shin, Shinwoong Park, S. Raman, Kwang-Jin Koh","doi":"10.1109/RFIC.2017.7969027","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969027","url":null,"abstract":"This paper presents an 8 GHz subharmonically injection-locked PLL (SILPLL), which is cascaded with a 24 GHz quadrature injection-locked oscillator in 130 nm CMOS. The proposed SILPLL adopts an envelope-detection based injection-timing calibration for synchronous reference pulse injection to a VCO. With one of the largest frequency division ratios (N=80) reported so far, the SILPLL exhibits 124 fs and 130 fs RMS jitter at 8 GHz and 24 GHz, respectively, with <−49 dBc reference spur. The measured phase noise at 1 MHz offset is −114 dBc/Hz at 8 GHz and −104 dBc/Hz at 24 GHz.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126997127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 28-GHz phased-array transceiver with series-fed dual-vector distributed beamforming 一种串联馈电双矢量分布式波束形成的28ghz相控阵收发器
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI: 10.1109/RFIC.2017.7969018
Yi-Shin Yeh, E. Balboni, B. Floyd
{"title":"A 28-GHz phased-array transceiver with series-fed dual-vector distributed beamforming","authors":"Yi-Shin Yeh, E. Balboni, B. Floyd","doi":"10.1109/RFIC.2017.7969018","DOIUrl":"https://doi.org/10.1109/RFIC.2017.7969018","url":null,"abstract":"This paper presents a 28-GHz four-element phased-array transceiver in 130-nm SiGe BiCMOS technology for 5G cellular application. The array employs scalar-only weighting functions within each front-end and a global quadrature function, enabling small footprint for each element. A dual-vector series feed network also reduces size of the array. Measurements show that each receive front-end achieves 8.7 to 11.5 dB gain, 4.5 to 6.9 dB noise figure, −25.4 to −18.4 dBm input 1-dB compression point, and < 0.5dB/2.1° RMS gain/phase error at 24 to 28 GHz. Each transmit front-end achieves 9.4 to 14.3 dB gain, 5.5 to 10.6 dBm output 1-dB compression point, and < 0.4dB/4.2° RMS gain/phase error at 24 to 28 GHz. The four-element transceiver array occupies 2.9 mm2 area and consumes 1.08 W in transmit mode and 0.68 W in receive mode.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126665879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
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