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2014 14th Biennial Baltic Electronic Conference (BEC)最新文献

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Asynchronous sequential circuits synthesis by high-performance computing 异步顺序电路的高性能计算合成
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320557
František Kudlačák, E. Gramatová
{"title":"Asynchronous sequential circuits synthesis by high-performance computing","authors":"František Kudlačák, E. Gramatová","doi":"10.1109/BEC.2014.7320557","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320557","url":null,"abstract":"The paper deals with asynchronous sequential circuits synthesis based on finite state machine representation at the logical level. A new computer-aided design (CAD) system has been developed using the finite state machine description in VHDL and a new design algorithm for generating a synthesized circuit model in VHDL. The developed CAD system was implemented for the single-processor system and also the high-performance computing system. Effectiveness of the new CAD system was evaluated on the high-performance computing system using different numbers of computational nodes by various types of finite state machines.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122291640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Method for synthesis model-reference adaptronic automatic control system 模型参考自适应自动控制系统的综合方法
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320569
V. Skopis, I. Uteshevs
{"title":"Method for synthesis model-reference adaptronic automatic control system","authors":"V. Skopis, I. Uteshevs","doi":"10.1109/BEC.2014.7320569","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320569","url":null,"abstract":"This article is based on previous papers where adaptronic system was derived on the basis of adaptive system. Here a method of synthesis adaptronic model-reference system is described. After introduction some material on self-tuning or adaptive system is revised. Then structural scheme of model-reference adaptive system is shown as well as equations for it. After that the structural scheme and mathematical equations for model-reference adaptronic system are derived. Based on them a computer simulation is created and its output signals are also described in the paper. At the end conclusions are made.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120940497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrochemical impedance spectroscopy analysis of immunoglobulin G in patients with gastric cancer 胃癌患者免疫球蛋白G的电化学阻抗谱分析
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320588
Kirill Sergejev, K. Klaamas, R. Land, O. Kurtenkov
{"title":"Electrochemical impedance spectroscopy analysis of immunoglobulin G in patients with gastric cancer","authors":"Kirill Sergejev, K. Klaamas, R. Land, O. Kurtenkov","doi":"10.1109/BEC.2014.7320588","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320588","url":null,"abstract":"AIM: To study whether alterations in the glycosylation of immunoglobulin G (IgG) as defined by an electrochemical impedance IgG analysis have a diagnostic potential in gastric cancer. Methods: Serum samples were obtained from patients with histologically verified gastric carcinoma and healthy blood donors. A lectin enzyme-linked immunosorbent assay-based glycoprofiling of IgG was performed using affinity purified IgG and lectins of various sugar specificities. Electrochemical measurements were carried out using 12.6 mm2 gold screenprinted electrodes DRP-220BT (DropSens, Spain). The measurement of impedance has been performed using Impedance Analyzers 6500B series. The sensitivity and specificity of differences between cancer patients and controls were evaluated by a receiver operating characteristic (ROC) curve analysis. All calculations and comparisons were performed using the SPSS 15.0 software. Results: A significant difference in electrochemical impedance parameters between cancer patients and controls was established (P = 0.01). This study revealed a rather high specificity (90%) and sensitivity (72.7%) for gastric cancer with 80.9% accuracy of diagnostics. The impedance values positively correlated with the reactivity of purified IgG to fucose-specific lectin (P<;0.01) suggesting that the impedance changes observed in cancer are related to the aberrant glycosylation of IgG. Conclusion: This is the first report indicating that a total serum IgG impedance analysis may be a promising technique for stomach cancer detection.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132256669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Initial version of real time model of acoustic transmission system with parametric multicarrier modulation 参数化多载波调制声传输系统实时模型的初始版本
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320571
A. Aboltins, P. Misans
{"title":"Initial version of real time model of acoustic transmission system with parametric multicarrier modulation","authors":"A. Aboltins, P. Misans","doi":"10.1109/BEC.2014.7320571","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320571","url":null,"abstract":"Parametric multicarrier (PMC) modulation is a new concept which allows transmission system to use broad range of orthogonal subcarrier waveforms and adjust them on the fly. Two largest challenges in PMC systems are synchronization between receiver and transmitter and equalization. Although algorithms of these tasks for PMC systems have been already addressed multiple times, they have not been tested together in a full transmission system. In order to prove soundness of the proposed concepts and for assessing performance of the synchronization and channel estimation algorithms, a real-time model of acoustic transmission system using Simulink platform has been created. The purpose of this publication is to present design an test results of this model and outline advantages and drawbacks of the chosen approach. Paper contains general description of transmission system design, specific details of implementation and test results.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130107312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
PCIe and DisplayPort based high speed Volumetric 3D video output card implementation in FPGA 基于PCIe和DisplayPort的高速立体视频输出卡在FPGA中的实现
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320556
K. Osmanis, G. Valters, I. Osmanis, P. Misans
{"title":"PCIe and DisplayPort based high speed Volumetric 3D video output card implementation in FPGA","authors":"K. Osmanis, G. Valters, I. Osmanis, P. Misans","doi":"10.1109/BEC.2014.7320556","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320556","url":null,"abstract":"This paper presents implementation of high-speed 3D volumetric video content output card based on digital electronics building blocks - Xilinx FPGA (multi gigabit transceivers and PCIe integrated block) and DDR3 RAM memory. Volumetric 3D video stream is mapped on DisplayPort 1.2 standard. Volumetric 3D image transfer rates up to 30Hz are achieved using Virtex-6 (XC6VLX240T-1FF1156) on ML605 development board. Higher transfer rates are planned in final design, using “-2” speed grade FPGA.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123814970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A fault-tolerant technique to detect and recover from open faults in FPGA interconnects FPGA互连中开放性故障的容错检测和恢复技术
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320558
G. Alkady, Nahla El-Araby, M. B. Abdelhalim, H. Amer, A. Madian
{"title":"A fault-tolerant technique to detect and recover from open faults in FPGA interconnects","authors":"G. Alkady, Nahla El-Araby, M. B. Abdelhalim, H. Amer, A. Madian","doi":"10.1109/BEC.2014.7320558","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320558","url":null,"abstract":"Nowadays, FPGAs play a great role in electronic circuits design especially in implementing critical applications. As a result, the need for adding fault-tolerance to FPGAs becomes very important. In this paper, a fault-tolerant technique and associated modifications on FPGA architecture are proposed. This technique can detect and recover from open faults in programmable interconnects. It was successfully simulated using an FPGA-based simulator.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127129224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Power converters with Silicon Carbide devices 采用碳化硅器件的电源转换器
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320544
J. Rąbkowski
{"title":"Power converters with Silicon Carbide devices","authors":"J. Rąbkowski","doi":"10.1109/BEC.2014.7320544","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320544","url":null,"abstract":"The paper discusses power electronic converters built with the use of new Silicon Carbide power devices: diodes and transistors. At first a discussion of SiC material properties is presented as a background to overview of currently available power transistors. Then, parameters of the devices are discussed with respect to Si counterparts and design possibilities are analyzed using example of a three-phase AC/DC converter with SiC MOSFETs. Moreover, various prototypes of the power converters are shown in this paper to illustrate high-frequency and high-efficiency designs. Presented examples reach frequencies of hundreds kHz to reduce passive components but a three-phase inverter with efficiency above 99.5% is also shown. Finally, the interleaved DC/DC boost converter having high efficiency (close to 99%) at high switching frequency (4×125kHz) is discussed in this paper.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124518755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Closed-loop identification of fractional-order models using FOMCON toolbox for MATLAB 分数阶模型闭环辨识用MATLAB工具箱
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320594
A. Tepljakov, E. Petlenkov, J. Belikov
{"title":"Closed-loop identification of fractional-order models using FOMCON toolbox for MATLAB","authors":"A. Tepljakov, E. Petlenkov, J. Belikov","doi":"10.1109/BEC.2014.7320594","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320594","url":null,"abstract":"Closed-loop identification methods attract significant interest because they grant the possibility to obtain industrial process models without the need to perform separate open-loop experiments thus avoiding potential production losses. In this paper, we study the problem of identifying a fractional-order process model of a plant working in a closed control loop. We consider both the direct and the indirect identification approaches. Identification is performed offline by means of minimizing the model output error and is based on data collected in the time domain. We provide the description of the software implementation of the proposed identification procedure. All necessary computations are performed in FOMCON toolbox for MATLAB. An exemplary closed-loop system is studied. It comprises a real-life fractional-order PID controller prototype, and a simulated model of a plant running on a personal computer based real-time prototyping platform. Experimental results are provided with relevant discussion.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116953654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Pipelined execution of data-parallel algorithms 数据并行算法的流水线执行
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320568
M. Gorev, R. Ubar
{"title":"Pipelined execution of data-parallel algorithms","authors":"M. Gorev, R. Ubar","doi":"10.1109/BEC.2014.7320568","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320568","url":null,"abstract":"A combination of pipelining and data-parallel execution on multiprocessor systems is proposed. The use of pipelining in coarse-grained data-parallel applications can be more advantageous, than the classical data-parallel approach. It is used in order to reduce redundant data transfers for all cores, involved in processing. Class of simulation applications is taken as an example to illustrate principles of the method. It is shown, that overall execution time could be reduced by significant amount of time required to transfer the model data. Set of experiments was carried out using a desktop multicore processor and OpenCL framework for parallel execution. Experimental results show that speedup is achievable even on general-purpose MPSoC platforms.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128806507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low noise LDO architecture with consideration for low voltage operation 低噪声LDO架构，考虑低电压运行
2014 14th Biennial Baltic Electronic Conference (BEC) Pub Date : 2014-10-01 DOI: 10.1109/BEC.2014.7320551
J. Mihhailov, V. Strik, S. Strik, T. Rang
{"title":"Low noise LDO architecture with consideration for low voltage operation","authors":"J. Mihhailov, V. Strik, S. Strik, T. Rang","doi":"10.1109/BEC.2014.7320551","DOIUrl":"https://doi.org/10.1109/BEC.2014.7320551","url":null,"abstract":"High performance low dropout regulator (LDO) is presented in this paper. An analysis of low noise architecture incorporating reference amplifier followed by a low-pass filter (LPF) and an error amplifier (EA) connected as a voltage follower is done, with a special focus on the low voltage operation implementation. By introduction of special design approach of error and reference amplifiers, low voltage operation of the regulator was achieved. This LDO is ideal for supplying sensitive loads in low power applications.","PeriodicalId":348260,"journal":{"name":"2014 14th Biennial Baltic Electronic Conference (BEC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130029423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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