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2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)最新文献

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Formal verification of an optimizing compiler 优化编译器的正式验证
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1007/978-3-540-73449-9_1
X. Leroy
{"title":"Formal verification of an optimizing compiler","authors":"X. Leroy","doi":"10.1007/978-3-540-73449-9_1","DOIUrl":"https://doi.org/10.1007/978-3-540-73449-9_1","url":null,"abstract":"","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130376548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
One-dimensional Search Algorithms for Hardware/Software Partitioning 硬件/软件分区的一维搜索算法
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371230
W. Jigang, T. Srikanthan, Guang Chen
{"title":"One-dimensional Search Algorithms for Hardware/Software Partitioning","authors":"W. Jigang, T. Srikanthan, Guang Chen","doi":"10.1109/MEMCOD.2007.371230","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371230","url":null,"abstract":"Hardware/software (HW/SW) partitioning is one of the key challenges in HW/SW co-design. This paper presents a new formulation to handle the HW/SW partitioning problem, which has been proved to be NP-hard. The proposed formulation transforms the partitioning problem into an extended 0-1 knapsack problem that is approximately solved in this paper by scanning a one-dimensional search space, instead of scanning a two-dimensional search space as presented in the literature cited in this paper. Two heuristic algorithms are proposed to explore the feasible partitions to meet the given constraints. The time complexity of the latest heuristic algorithm is significantly reduced from O(dx ldr dy ldr n3) to O(n log n + d ldr (n + m)) for the given graphs with n nodes and m edges, where dx ldr dy is the number of the fragments of the scanned two-dimensional search space, and d is that of the scanned one-dimensional search space. Empirical results show that the proposed algorithms run extremely fast and still produce better or similar solutions in comparison with the latest algorithm.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114235720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Bringing Hardware and Software Closer Together with Termination Analysis 通过终止分析使硬件和软件更紧密地结合在一起
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371223
B. Cook
{"title":"Bringing Hardware and Software Closer Together with Termination Analysis","authors":"B. Cook","doi":"10.1109/MEMCOD.2007.371223","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371223","url":null,"abstract":"When computers hang the root cause is usually due to termination bugs in the software that interfaces with hardware. In this talk the author discuss efforts to build program termination proof tools designed to find these types of bugs in systems software.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126768878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design 延迟不敏感设计的新型接口电路的设计、实现和验证
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371256
Cheng-Hong Li, R. Collins, Sampada Sonalkar, L. Carloni
{"title":"Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design","authors":"Cheng-Hong Li, R. Collins, Sampada Sonalkar, L. Carloni","doi":"10.1109/MEMCOD.2007.371256","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371256","url":null,"abstract":"With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to system-on-chip designers. Latency-insensitive design (LID) has been proposed as a \"correct-by-construction\" design methodology to cope with this problem. In this paper we present the design and implementation of a new class of interface circuits to support LID that offers substantial performance improvements with limited area overhead with respect to previous designs proposed in the literature. This claim is supported by the experimental results that we obtained completing semi-custom implementations of the three designs with a 90 nm industrial standard-cell library. We also report on the formal verification of our design: using the NuSMV model checker we verified that the RTL synthesizable implementations of our LID interface circuits (relay stations and shells) are correct refinements of the corresponding abstract specifications according to the theory of LID.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123784574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 28
Towards a Unified Execution Model for Transactions in TLM TLM中事务统一执行模型的研究
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371237
B. Niemann, C. Haubelt
{"title":"Towards a Unified Execution Model for Transactions in TLM","authors":"B. Niemann, C. Haubelt","doi":"10.1109/MEMCOD.2007.371237","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371237","url":null,"abstract":"Even though transaction level modeling (TLM) with SystemC is widely being used and despite the existence of several formal models for TLM, there is no generally accepted definition of what a transaction is and how exactly to define transaction level modeling. The key contribution of this paper is the analysis of TLM characteristics and a definition of transactions resulting in better analyzability of TLMs. For this purpose, transactions are restricted to the ACID properties (atomicity, consistency, isolation, and durability) known from database systems. Based on these results, a finite state machine model well suited for formal analysis was proposed along with an implementation of the basic concepts in SystemC.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132340754","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Methodology for Automating Co-Scheduling for Reconfigurable Computing Systems 一种可重构计算系统协同调度自动化方法
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371229
P. Saha, T. El-Ghazawi
{"title":"A Methodology for Automating Co-Scheduling for Reconfigurable Computing Systems","authors":"P. Saha, T. El-Ghazawi","doi":"10.1109/MEMCOD.2007.371229","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371229","url":null,"abstract":"A formal methodology for automatic hardware-software partitioning and co-scheduling between the muP and the FPGA has not yet been established. Current work in automatic task partitioning and scheduling for reconfigurable systems strictly addresses the FPGA hardware, and does not take advantage of the synergy between the microprocessor and the FPGA. In this work, we consider the problem of co-scheduling task graphs on reconfigurable systems. The target systems have an execution model which allows any subtask that can run on the FPGA to also run on the microprocessor, and allows reconfigurability of the FPGA (subject to area, performance, resource, and timing constraints). In this paper, we introduce a methodology for automatic co- scheduling using a proposed heuristic algorithm for hardware/software co-scheduling, ReCoS. It will be shown that the proposed algorithm provides up to an order of magnitude improvement in scheduling and execution times when compared with hardware/software co-schedulers found in related fields such as embedded systems, heterogeneous systems, and reconfigurable hardware systems.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133569938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Computing Invariants for Parameter Abstraction 计算参数抽象的不变量
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371252
Yi Lv, Huimin Lin, Hong Pan
{"title":"Computing Invariants for Parameter Abstraction","authors":"Yi Lv, Huimin Lin, Hong Pan","doi":"10.1109/MEMCOD.2007.371252","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371252","url":null,"abstract":"A new approach to combining invariants computing and guard strengthening methods is presented in the context of parameter abstraction for parameterized model checking of cache coherence protocols. The approach uses a small instance of a parameterized protocol as a \"reference model\" to compute candidate invariants. References to a specific node in these candidate invariants are then abstracted away, and the resulting formulas are used to strengthen guards of the transition rules in the abstract node. The correctness of the approach is guaranteed by symmetry which exists in many parameterized systems. A number of case studies have been carried out to illustrate the effectiveness of the approach. During the process a data consistency error was identified and fixed in the German 2004 cache coherence protocol.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"49 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131717998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Extended Architecture Analysis Description Language for Software Product Line Approach in Embedded Systems 嵌入式系统软件产品线方法的扩展体系结构分析描述语言
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371243
Young-Bae Oh, Danhyung Lee, Sungwon Kang, Jihyun Lee
{"title":"Extended Architecture Analysis Description Language for Software Product Line Approach in Embedded Systems","authors":"Young-Bae Oh, Danhyung Lee, Sungwon Kang, Jihyun Lee","doi":"10.1109/MEMCOD.2007.371243","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371243","url":null,"abstract":"Describing architecture variabilities explicitly and precisely is important in the software product line approach for software development since it helps product derivation as well as modeling and managing the variabilities. The SAE AADL is an industry standard architecture analysis and design language for the automotive community, which originally was not intended to be used for software product line. In this paper, we propose EAADL a software product line architecture description language for the automotive domain that extends the SAE AADL. By incorporating orthogonal variability model into it, EAADL offers traceability with requirement engineering as well as the implementation process that is essential in software product line engineering.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"287 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124575952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
VT Matrix Multiply Design for MEMOCODE '07 MEMOCODE '07的VT矩阵乘法设计
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371240
E. Simpson, Pengyuan Yu, P. Schaumont, Sumit Ahuja, S. Shukla
{"title":"VT Matrix Multiply Design for MEMOCODE '07","authors":"E. Simpson, Pengyuan Yu, P. Schaumont, Sumit Ahuja, S. Shukla","doi":"10.1109/MEMCOD.2007.371240","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371240","url":null,"abstract":"This design presents a system optimized for complex matrix multiplications on the XUP Virtex-II board. Utilizing the GEZEL HW/SW co-simulation environment, the resulting system achieves ~25x speedup over a standard software only implementation. Further system level optimization (with DMA) results in the same coprocessor being speedup by at least another order of magnitude.","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124149281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
McCharts and Multiclock FSMs for modeling large scale systems 用于大型系统建模的McCharts和Multiclock FSMs
2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI: 10.1109/MEMCOD.2007.371257
Ivan Radojevic, Z. Salcic, P. Roop
{"title":"McCharts and Multiclock FSMs for modeling large scale systems","authors":"Ivan Radojevic, Z. Salcic, P. Roop","doi":"10.1109/MEMCOD.2007.371257","DOIUrl":"https://doi.org/10.1109/MEMCOD.2007.371257","url":null,"abstract":"Single-clock specifications with purely synchronous communication have been successfully used in capturing the behavior of small and medium scale embedded systems. In large scale embedded systems, where processes often operate at vastly different speeds, using a single clock in an entire specification can be difficult. In this paper, we present Multiclock Charts (McCharts), a language where finite state machines driven by different clocks are composed. The communication between FSMs is specified by both synchronous and asynchronous mechanisms. The essential feature in the semantics of McCharts is that a complete specification can be mapped onto a single multiclock FSM (MCFSM).","PeriodicalId":345459,"journal":{"name":"2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)","volume":"402 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122251811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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