MEMOCODE '07的VT矩阵乘法设计

2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) Pub Date : 2007-05-30 DOI:10.1109/MEMCOD.2007.371240

E. Simpson, Pengyuan Yu, P. Schaumont, Sumit Ahuja, S. Shukla

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引用次数: 1

摘要

本设计提出了一个在XUP Virtex-II板上进行复杂矩阵乘法优化的系统。利用GEZEL硬件/软件联合仿真环境，所得到的系统比标准软件实现的速度提高了25倍。进一步的系统级优化(使用DMA)会使同一个协处理器的速度至少提高一个数量级。

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VT Matrix Multiply Design for MEMOCODE '07

This design presents a system optimized for complex matrix multiplications on the XUP Virtex-II board. Utilizing the GEZEL HW/SW co-simulation environment, the resulting system achieves ~25x speedup over a standard software only implementation. Further system level optimization (with DMA) results in the same coprocessor being speedup by at least another order of magnitude.

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来源期刊

2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007)

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