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The Mimola Design System a Computer Aided Digital Processor Design Method Mimola设计系统是一种计算机辅助数字处理器设计方法
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1145/62882.62944
G. Zimmermann
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引用次数: 82
Efficient Simulation of AHPL AHPL的高效仿真
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600116
Z. Navabi, F. Hill
{"title":"Efficient Simulation of AHPL","authors":"Z. Navabi, F. Hill","doi":"10.1109/DAC.1979.1600116","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600116","url":null,"abstract":"HPSIM2 is a second generation simulator for AHPL featuring a conditional input syntax. HPSIM2 replaces a less efficient simulator in an AHPL software package which includes a hardware compiler.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132550696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Component Library for an Integrated DA System 集成数据处理系统的组件库
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600148
K. Nieng, D. A. Beckley
{"title":"Component Library for an Integrated DA System","authors":"K. Nieng, D. A. Beckley","doi":"10.1109/DAC.1979.1600148","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600148","url":null,"abstract":"This paper describes the component library facilities for an integrated DA system at GTE Automatic Electric Laboratories and the approach to the data base design for the component library.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132099559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A Partial Solution to Fitting Large Parametric Surfaces in Computer-Aided Design Systems 计算机辅助设计系统中大参数曲面拟合的部分解
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600111
L. Lichten
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引用次数: 0
Dynamic Design Rule Checking in an Interactive Printed Circuit Editor 交互式印刷电路编辑器中的动态设计规则检查
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600128
T. C. Bennett, K. R. Stevens, W. M. V. Cleemput
{"title":"Dynamic Design Rule Checking in an Interactive Printed Circuit Editor","authors":"T. C. Bennett, K. R. Stevens, W. M. V. Cleemput","doi":"10.1109/DAC.1979.1600128","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600128","url":null,"abstract":"This paper describes an interactive system for editing of printed circuit layout designs. Each editing operation is dynamically checked against a set of user-defined design rules to assure that the resulting design is valid.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128727079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Placement Algorithm by Partitioning for Optimum Rectangular Placement 基于分区的最优矩形布局算法
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600083
E. Stabler, V. Kureichik, V. A. Kalashnikov
{"title":"Placement Algorithm by Partitioning for Optimum Rectangular Placement","authors":"E. Stabler, V. Kureichik, V. A. Kalashnikov","doi":"10.1109/DAC.1979.1600083","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600083","url":null,"abstract":"This paper describes methods for placement of DIP packages on a rectangular grid with minimum crossovers and wire length. The initial step is partitioning the components into subsets, one subset for each row, such that the connection between rows are minimized. An iterative procedure, yielding successively improved partitioning, is used for this purpose. Once the row sets are formed, a process for best placement of the DIP in a row is carried-out. The row is assumed to have either a one row channel for routing wires or two row channels. For both cases a placement which minimized crossovers and line length is obtained. The basic method uses simple branch and bound search procedures for placing the packages within a row set. In the placement procedure the objects being placed are wire nets rather than components. Previous work related to this problem is included in references [1-6].","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114332583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The Complete VLSI Design System 完整的VLSI设计系统
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600150
M. F. Oakes
{"title":"The Complete VLSI Design System","authors":"M. F. Oakes","doi":"10.1109/DAC.1979.1600150","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600150","url":null,"abstract":"This paper describes a complete VLSI design system on a small computer, that will provide a powerful but flexible design aid for most projected technologies into the 1990's. The paper describes existing design methods, highlighting the shortcomings of these methods. The advantages and disadvantages of a system that maintains the connectivity information through the complete design are discussed. Solutions to these disadvantages are proposed, and a description of how these are incorporated into a small computer CAD system is given.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124700305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An Application of Branch and Bound Method to Automatic Printed Circuit Board Routing 分支定界法在印刷电路板自动布线中的应用
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600156
Lawrence Dysart, Mikhail Koifman
{"title":"An Application of Branch and Bound Method to Automatic Printed Circuit Board Routing","authors":"Lawrence Dysart, Mikhail Koifman","doi":"10.1109/DAC.1979.1600156","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600156","url":null,"abstract":"This paper describes an approach to PCB routing which applies the Branch and Bound Method to the search for a path between two points. A special multiple pass method of pseudo-parallel routing is applied in order to insure that simple interconnections are made at the earliest stages. The algorithm has been implemented by Computervision Corporation on a 32K word, 16 bit minicomputer based system.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128174636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Concepts of a Microcomputer Design Language 微型计算机设计语言的概念
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600087
Y. Chu
{"title":"Concepts of a Microcomputer Design Language","authors":"Y. Chu","doi":"10.1109/DAC.1979.1600087","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600087","url":null,"abstract":"The rapid advance of semiconductor device technology makes the current computer design tools inadequate. New tools need to be developed. This paper presents the development of a microcomputer design language for us as a tool to microcomputer engineers. Several unique language constructs have been conceived. One is the use of level numbers to permit hierarchical descriptions of a microcomputer; in this way, the descriptions at various degrees of detail can be obtained. Another is the description of interconnections among the chips. A third is the possible provision of three levels of chip descriptions. A most important benefit of using a design language is the use of a simulator for checking out the design. Another possible benefit is the use of a data base which stores chip descriptions. Together with the simulator and the data base, a microcomputer design system could be realized.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"186 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124752262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Design Aids Data Base for Digital Components 数字元件设计辅助数据库
16th Design Automation Conference Pub Date : 1979-06-25 DOI: 10.1109/DAC.1979.1600146
Daniel J. Sucher, D. F. Wann
{"title":"A Design Aids Data Base for Digital Components","authors":"Daniel J. Sucher, D. F. Wann","doi":"10.1109/DAC.1979.1600146","DOIUrl":"https://doi.org/10.1109/DAC.1979.1600146","url":null,"abstract":"A data base containing pertinent information about the components used in a design is a central part of all digital design aids systems. This paper outlines a data base that has been developed for accomodating a wide variety of integrated circuits (IC's) as well as discrete components. A detailed description of the file structure and access subroutines is included, along with a discussion of the design decisions made during their construction.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"517 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123099512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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