1994 Proceedings. 44th Electronic Components and Technology Conference最新文献

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Etching defects on KOH etched silicon-implementation of silicon bench technology for low cost packaging 在KOH蚀刻硅上蚀刻缺陷实现低成本封装的硅工作台技术
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367607
H. Han, R. Boudreau, T. Bowen, S. Tan, M. L. Reed
{"title":"Etching defects on KOH etched silicon-implementation of silicon bench technology for low cost packaging","authors":"H. Han, R. Boudreau, T. Bowen, S. Tan, M. L. Reed","doi":"10.1109/ECTC.1994.367607","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367607","url":null,"abstract":"In this paper we report our experimental results about etching defects and microscopic surface roughness on potassium hydroxide (KOH) etched [100] silicon. We have studied the formation and morphology of etch hillock defects during the anisotropic etching. The morphology of etch hillocks depends on process condition. Our measurements and calculations reveal that the pyramidal shaped hillocks are bounded by {567} and {313} planes after period of etching in 30% wt and 45% wt KOH solutions respectively. Our experimental results indicated that hillock defect density is correlated with low etchant concentration and high etch temperature. The activation energy for defect formation is 1.2 eV, considerably higher than the energy associated with silicon removal. Examination of defects by electron microscopy suggests that a regrowth process may be involved in defect formation.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115409648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Fluxless soldering process technology 无焊剂焊接工艺技术
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367618
T. Nishikawa, M. Ijuin, R. Satoh, Y. Iwata, M. Tamura, M. Shirai
{"title":"Fluxless soldering process technology","authors":"T. Nishikawa, M. Ijuin, R. Satoh, Y. Iwata, M. Tamura, M. Shirai","doi":"10.1109/ECTC.1994.367618","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367618","url":null,"abstract":"This paper describes a reflow soldering process not requiring the use of flux. There are basically two fluxless soldering processes. Initially, we developed a process in which an argon-atom sputter-etching technique is employed to clean the surface, and reoxidation is prevented by carrying out aligning, mounting, and reflowing in an inert gas in a vacuum chamber. Then, for purposes of simplification, we developed a more convenient process in which, following the surface cleaning, the aligning and mounting are done in an atmosphere of ordinary air and then the reflowing is done in a belt furnace. This causes the reoxidation on surfaces activated by sputter-etching to be approximately the same both in a vacuum and in an air at room temperature. The thin oxide film is easy to break by volume expansion when it is melted. This allows the solder to wet. Applications to F.C.B. (Flip Chip Bonding) are possible between Au-metallized Ni surfaces and two types of solder (Pb3.6Sn and Sn3Ag). Excellent soldering results have been obtained using this new process. Basic characterization of a soldering process is determined by wettability tests. After sputter-etching, samples can be stored in air for one week. Oxygen density in a reflow atmosphere is allowed to reach 20 ppm. Based on our evaluations, it is concluded that this process is simple and convenient for manufacturing circuits.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"151 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130996992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Generation and measurement of high-power picosecond pulses from Q-switched two-section broad-area quantum well lasers 调q双截面广域量子阱激光器高功率皮秒脉冲的产生与测量
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367583
S. Yang, B. Thedrez, S. Saddow, C. Wood, R. Wilson, C.H. Lee
{"title":"Generation and measurement of high-power picosecond pulses from Q-switched two-section broad-area quantum well lasers","authors":"S. Yang, B. Thedrez, S. Saddow, C. Wood, R. Wilson, C.H. Lee","doi":"10.1109/ECTC.1994.367583","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367583","url":null,"abstract":"Optical pulses with energies as large as 120 pJ and pulse widths as short as 21 ps (FWHM) have been generated from Q-switched two-section broad-area quantum-well (QW) lasers. Employing an integrated photoconductive switch (PCS) as the switching element, our Q-switching scheme avoids packaging parasitics and allows jitter-free synchronization with the switching signal. As a result, it enables us to make an all-optical measurement of the optical pulse characteristics. In particular, a turn-on delay as short as 70 ps has been recorded for a cavity round-trip time of 17 ps. Computer simulations show good agreement with experimental data, and predict that the laser performance can be further improved by coating the facets and reducing the cavity length.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131288738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Thin-film decoupling capacitors for multi-chip modules 用于多芯片模块的薄膜去耦电容器
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367523
D. Dimos, S. Lockwood, R. Schwartz, M. S. Rodgers
{"title":"Thin-film decoupling capacitors for multi-chip modules","authors":"D. Dimos, S. Lockwood, R. Schwartz, M. S. Rodgers","doi":"10.1109/ECTC.1994.367523","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367523","url":null,"abstract":"Thin-film decoupling capacitors based on ferroelectric lead lanthanum zirconate titanate (PLZT) films are being developed for use in advanced packages, such as multi-chip modules. These thin-film decoupling capacitors are intended to replace multi-layer ceramic capacitors for certain applications, since they can be more fully integrated into the packaging architecture. The increased integration that can be achieved should lead to decreased package volume and improved high-speed performance, due to a decrease in interconnect inductance. PLZT films are fabricated by spin coating using metal carboxylate/alkoxide solutions. These films exhibit very high dielectric constants (/spl epsi//spl ges/900), low dielectric losses (tan/spl delta//spl ap/0.01), excellent insulation resistances (/spl rho/>10/sup 13/ /spl Omega/-cm at 125/spl deg/C), and good breakdown field strengths (E/sub B//spl ap/900 kV/cm). For integrated circuit applications, the PLZT dielectric is less than 1 /spl mu/m thick, which results in a large capacitance/area (8-9 nF/mm/sup 2/). The thin-film geometry and processing conditions also make these capacitors suitable for direct incorporation onto integrated circuits and for packages that require embedded components.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125676496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Connectors in the outside plant environment: is performance and reliability a concern 外部工厂环境中的连接器:性能和可靠性值得关注
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367508
A. Agarwal, L. Hutcheson
{"title":"Connectors in the outside plant environment: is performance and reliability a concern","authors":"A. Agarwal, L. Hutcheson","doi":"10.1109/ECTC.1994.367508","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367508","url":null,"abstract":"Telecommunication systems for telephony, video and other broadband services will use a large number of fiber optic connectors in the outside plant. In order to meet telecom plant expectations, these connectors must maintain their performance for at least 15-20 years. Are the available connector designs capable of meeting these requirements? Is performance and reliability a concern? To answer these questions and develop some understanding, SC type connectors from four manufacturers were subjected to a series of tests to simulate outside plant conditions. This paper presents the results of the environmental tests and discusses issues related with fiber optic connectors.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121582373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Factors governing the selection of a microwave material for circuit design 控制电路设计中微波材料选择的因素
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367541
T. S. Laverghetta
{"title":"Factors governing the selection of a microwave material for circuit design","authors":"T. S. Laverghetta","doi":"10.1109/ECTC.1994.367541","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367541","url":null,"abstract":"Many times the choice of a material for a particular microwave circuit depends on what was used on the previous job or what happens to be in the plant at the time the design is undertaken. Since the material is an integral part of the microwave design, a great deal of care should be taken to determine the proper material for each individual design. This paper will present the factors that should be considered when choosing the proper material.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124077680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Laser bumping for flip chip and TAB applications 倒装芯片和标签应用的激光碰撞
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367520
D. Metzger, U. Beutler, J. Eldring, H. Reichl
{"title":"Laser bumping for flip chip and TAB applications","authors":"D. Metzger, U. Beutler, J. Eldring, H. Reichl","doi":"10.1109/ECTC.1994.367520","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367520","url":null,"abstract":"An important aspect in microelectronics and packaging technologies is single chip bumping. A laser bumping method is suggested both for flip chip and TAB (tape automated bonding) applications. Laser chemical vapor deposition with an organometallic gold compound was used to deposit gold bumps from the vapor phase. With a computer controlled laser deposition system the laser bumping process was performed. The laser deposition was carried out on a gold pad metallization which is used on GaAs devices. Growth rate and bump height were determined as function of deposition time, chip temperature and laser power. The optimal deposition parameters for the laser bumping process were determined. Bump heights of 70 /spl mu/m were deposited with growth rates up to 6 /spl mu/m/s. Bump shape, height and morphology were shown with SEM and metallographic cross sections. A good morphology and contact wetting were achieved with a laser power of 1.9 W and a device temperature of 100/spl deg/. The bondability of the deposited laser bumps were proved. The bonding process with a gold plated copper tape was performed by TAB thermocompression gang bonding and TAB single point bonding. The bond strengths were investigated with pull tests. The bumps were flip chip thermocompression bonded onto a sputtered TiW/Au metallization on a Si-substrate.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121625195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Characterization and reduction of simultaneous switching noise for a multilayer package 多层封装同步开关噪声的表征与降低
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367514
N. Hirano, M. Miura, Y. Hiruta, Toshio Sudo
{"title":"Characterization and reduction of simultaneous switching noise for a multilayer package","authors":"N. Hirano, M. Miura, Y. Hiruta, Toshio Sudo","doi":"10.1109/ECTC.1994.367514","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367514","url":null,"abstract":"This paper reports a test chip and an experimental method for characterizing the simultaneous switching noise (SSN) and the noise dependency on the ground pin assignment of a multilayer package. The SSN measurement was executed for various ground pin assignments. The measured results demonstrated that an extra electric current path of the displaced ground pin assignment enhanced the ground bounce due to increasing the effective inductance of package. A balanced pin assignment of the ground pins which suppressed the extra current path in the ground plane had a 20% reduction effect for SSN compared with conventional pin assignments. The extra current path of the ground plane was also verified by an electromagnetic field simulation. The modeling procedure was established for the noise estimation using the inductance value estimated by the field simulation. The circuit simulation resulted in a good agreement with the measured results, and the noise simulation method was applicable for the noise estimation at earlier stage of the package design.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129452892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
Leadframe designs for minimum molding-induced warpage 引线框架设计,以减少成型引起的翘曲
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367545
L. Nguyen, K. Chen, P. Lee
{"title":"Leadframe designs for minimum molding-induced warpage","authors":"L. Nguyen, K. Chen, P. Lee","doi":"10.1109/ECTC.1994.367545","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367545","url":null,"abstract":"The current packaging trend toward thinner packages has pushed the leadframe manufacturing technology to the limits. For instance, with Ultra Thin Small Outline Packages (UTSOPs), the total form factor is less than 0.5 mm thick, which is about twice the thickness of the typical leadframe used in current standard IC packages. Thus, the leadframe must be scaled down appropriately with the rest of the package components. The thinner leadframe stock brings a host of handling difficulties. Most important of all is the bending and twisting of the leadframes caused by molding induced stresses. The resulting deformation affects the subsequent post-molding steps such as trim and form, and may seriously increase the production yield loss due to lead non-coplanarity. This study addresses the manufacturing and design issues involved with minimizing these molding-induced stresses. Through a combination of good control on the process parameters (e.g., post-molding handling, cooling, deflash procedures, etc.) and leadframe designs (e.g., package relative positioning within the leadframe strips, relief holes and slots, strengthened support strips, etc.), leadframe warpage from thermomechanical stresses can be reduced. Warpage predictions from finite element simulation will be presented for various leadframe designs in this paper.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"2007 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128901249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A geometric model for leaky wave antenna radiative interconnects for gigabit logic multi chip modules 千兆位逻辑多芯片模块漏波天线辐射互连的几何模型
1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367601
R. Seager, M. Svítek, M. Iyer, V. Yadav, Y. Vardaxoglou
{"title":"A geometric model for leaky wave antenna radiative interconnects for gigabit logic multi chip modules","authors":"R. Seager, M. Svítek, M. Iyer, V. Yadav, Y. Vardaxoglou","doi":"10.1109/ECTC.1994.367601","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367601","url":null,"abstract":"Initial design guidelines for a new MCM interconnection system are reported. These guidelines are based on a consideration of the geometry of the MCM. The interconnection system uses radiative interconnects based on dielectric guide leaky wave antennas to avoid the problems associated with the substrate, viz. reflections, lower propagation velocity and crosstalk. The Geometric Model developed predicts an optimum chip spacing for microwave beams reflected from a package lid as well as the bandwidth and beam pattern of a reflected beam. The results presented agree well with those obtained from Transmission Line Matrix modelling.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130049401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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