C. Bolchini, A. Bosio, Luca Cassano, B. Deveautour, G. D. Natale, A. Miele, Ian O’Connor, E. Vatajelu
{"title":"Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?","authors":"C. Bolchini, A. Bosio, Luca Cassano, B. Deveautour, G. D. Natale, A. Miele, Ian O’Connor, E. Vatajelu","doi":"10.1109/ddecs54261.2022.9770138","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770138","url":null,"abstract":"Today we observe amazing performance achieved by Machine Learning (ML); for specific tasks it even surpasses human capabilities. Unfortunately, nothing comes for free: the hidden cost behind ML performance stems from its high complexity in terms of operations to be computed and the involved amount of data. For this reasons, custom Artificial Intelligence hardware accelerators based on alternative computing paradigms are attracting large interest. Such dedicated devices support the energy-hungry data movement, speed of computation, and memory resources that MLs require to realize their full potential. However, when ML is deployed on safety-/mission-critical applications, dependability becomes a concern. This paper presents the state of the art of custom Artificial Intelligence hardware architectures for ML, here Spiking and Convolutional Neural Networks, and shows the best practices to evaluate their dependability.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117035229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Versatile Hardware Framework for Elliptic Curve Cryptography","authors":"Vit Masek, M. Novotný","doi":"10.1109/ddecs54261.2022.9770143","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770143","url":null,"abstract":"We propose versatile hardware framework for ECC. The framework supports arithmetic operations over P-256, Ed25519 and Curve25519 curves, enabling easy implementation of various ECC algorithms. Framework finds its application area e.g. in FIDO2 attestation or in nowadays rapidly expanding field of hardware wallets. As the design is intended to be ASIC-ready, we designed it to be area efficient. Hardware units are reused for calculations in several finite fields, and some of them are superior to previously designed circuits in terms of time-area product. The framework implements several attack countermeasures. It enables implementation of certain countermeasures even in later stages of design. The design was validated on SoC FPGA.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"03 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129166001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synaptic Control for Hardware Implementation of Spike Timing Dependent Plasticity","authors":"Salah Daddinounou, E. Vatajelu","doi":"10.1109/ddecs54261.2022.9770171","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770171","url":null,"abstract":"Spiking neural networks (SNN) are biologically plausible networks. Compared to formal neural networks, they come with huge benefits related to their asynchronous processing and massively parallel architecture. Recent developments in neuromorphics aim to implement these SNNs in hardware to fully exploit their potential in terms of low energy consumption. In this paper, the plasticity of a multi-state conductance synapse in SNN is shown. The synapse is a compound of multiple Magnetic Tunnel Junction (MTJ) devices connected in parallel. The network performs learning by potentiation and depression of the synapses. In this paper we show how these two mechanisms can be obtained in hardware-implemented SNNs. We present a methodology to achieve the Spike Timing Dependent Plasticity (STDP) learning rule in hardware by carefully engineering the post- and pre-synaptic signals. We demonstrate synaptic plasticity as a function of the relative spiking time of input and output neurons only.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116006012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Maljar, D. Arbet, M. Kovác, R. Ondica, V. Stopjaková
{"title":"Autocalibration Approach for Improving Robustness of Analog ICs","authors":"D. Maljar, D. Arbet, M. Kovác, R. Ondica, V. Stopjaková","doi":"10.1109/ddecs54261.2022.9770155","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770155","url":null,"abstract":"This work presents a dedicated method of analog integrated circuit (IC) autocalibration, which was used to calibrate a voltage reference with the output voltage value of 96 mV . The reference accuracy might be significantly influenced by fluctuations in the manufacturing process. The essence of this technique is to suppress this undesired influence of process variations in terms of the corner conditions of 130 nm CMOS technology. All analog parts of the proposed autocalibration system are presented at the transistor level. The output of the calibration subcircuit is a digital signal controlling the autocalibration.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124422466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kemal Çağlar Coşkun, Muhammad Hassan, R. Drechsler
{"title":"Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters","authors":"Kemal Çağlar Coşkun, Muhammad Hassan, R. Drechsler","doi":"10.1109/ddecs54261.2022.9770142","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770142","url":null,"abstract":"Due to the increasing complexity of analog circuits and their integration into System-on-Chips (SoC), the analog design and verification industry would greatly benefit from an expansion of system-level methodologies, which provide speed benefits in comparison to SPICE simulations and allow interoperability with digital tools at the system-level. However, a key barrier to the expansion of system-level tools for analog circuits is the lack of confidence in system-level models implemented in SystemC AMS. To overcome this, functional equivalence of system-level models to respective SPICE-level models needs to be demonstrated. In this paper, we develop a novel, graph-based methodology to formally check equivalence between system-level and SPICE-level representations of linear analog filter circuits, such as Low-Pass Filters (LPF). To do this, we propose an intermediate representation in the form of a Signal-flow Graph (SFG), which acts as a mapping function from the SPICE-level to the system-level. We create the intermediate representation with linear graph modeling from the SPICE-level model and use graph manipulation to transform the intermediate representation to the equivalent system-level model. We demonstrate the applicability of the proposed methodology by successfully applying it to two example filters.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114700140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fault Tolerant Synchronous Multi-Channel Buck Converter for Nuclear Inspection Instruments","authors":"Y. Verbelen, A. Banos, Tom B. Scott","doi":"10.1109/ddecs54261.2022.9770164","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770164","url":null,"abstract":"Presented here is a compact power supply design for robots operating in nuclear environments, which must be tolerant to damage from ionising radiation. The proposed topology is fault-tolerant through intrinsic redundancy in its layout, with 8 independent channels operating in parallel. This application-specific implementation operates as a buck regulator (step-down) with an input voltage range of 12 V – 48 V DC and a continuous output power of 250 W without requiring passive or active cooling other than ambient air flow. The electrical efficiency of the prototype varies between 70% and 90% at the rated maximum input voltage of 48 V. The architecture of the design is presented, and an analysis of possible failure modes is conducted along with circuit level remediation efforts to make the design intrinsically fail-safe. The fault tolerance and redundancy are illustrated by artificially inducing faults on prototype boards during performance measurements. Finally, the prototype is assembled into a hexapod walker robot and deployed in a radioactive environment as a field test of its radiation and fault tolerant properties.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126979004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Concept Towards Pressure-Controlled Microfluidic Networks","authors":"G. Fink, M. Hamidović, W. Haselmayr, R. Wille","doi":"10.1109/ddecs54261.2022.9770111","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770111","url":null,"abstract":"Droplet-based microfluidic networks interconnect multiple microfluidic modules which allow to process (e.g., mix, sort, heat, incubate) so-called payload droplets (i.e., droplets containing a biological sample) on a single microfluidic chip. Inside such networks the path of a droplet and, thus, the module which processes it, can be controlled by microfluidic switches. Thus far, these switches are realized by injecting additional control droplets into the network which allow to trigger the switching mechanism by solely exploiting passive hydrodynamic effects. While this eliminates the need of expensive components such as valves, this droplet-controlled switching concept is very sensitive and already slight deviations, e.g., in the control droplet injection could lead to incorrectly triggered switches. In this work, we address this issue by proposing a new concept of pressure-controlled networks which omit the control droplets (and their drawbacks) and, instead, use a single pump in order to drive the switches. Using design automation expertise together with established models, we derive a corresponding blueprint which realizes this idea for a specific network architecture. Simulations based on established methods and design tools confirmed the suitability of the proposed pressure-controlled networks.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"521 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124487180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ML-based Power Estimation of Convolutional Neural Networks on GPGPUs","authors":"Christopher A. Metz, Mehran Goli, R. Drechsler","doi":"10.1109/ddecs54261.2022.9770153","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770153","url":null,"abstract":"The increasing application of Machine Learning (ML) techniques on the Internet of Things (IoTs) has led to the leverage of ML accelerators like General Purpose Computing on Graphics Processing Units (GPGPUs) in such devices. However, selecting the most appropriate accelerator for IoT devices is very challenging as they commonly have tight constraints e.g., low power consumption, latency, and cost of the final product. Hence, the design of such application-specific IoT devices becomes a time-consuming and effort-hungry process, that poses the need for accurate and effective automated assisting methods.In this paper, we present a novel approach to estimate the power consumption of CUDA-based Convolutional Neural Networks (CNNs) on GPGPUs in the early design phases. The proposed approach takes advantage of a hybrid technique where static analysis is used for features extraction and the K-Nearest Neighbor (K-NN) regression analysis is utilized for power estimation model generation. Using K-NN analysis, the power estimation model can even be created with small training datasets. Experimental results demonstrate that the proposed approach is able to predict CNNs power consumption up to a Absolute Percentage Error of 0.0003% in comparison to the real hardware.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128567482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Antonis Banos, Y. Verbelen, S. Kaluvan, C. Hutson, M. R. Tucker, Tom B. Scott
{"title":"Hexapod robotic system for indoor neutron and gamma radiation mapping and inspection","authors":"Antonis Banos, Y. Verbelen, S. Kaluvan, C. Hutson, M. R. Tucker, Tom B. Scott","doi":"10.1109/ddecs54261.2022.9770114","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770114","url":null,"abstract":"The development and demonstration use of a hexapod robotic system for indoor gamma and neutron radiation mapping in confined spaces is presented. The prototype software is ROS-based and uses laser-based 2D SLAM techniques to navigate an unknown environment, while recording continuous measurements of gamma and neutron radiation at a 1Hz sampling rate. Experiments demonstrated that the robot could successfully map controlled environments, producing 2D radiation maps clearly identifying ‘hotspots’ that coincided with the location of radiation sources hidden in the test range. The tests confirmed that the hexapod platform exhibits superior performance regarding contamination pick-up when compared to other motion systems such as tracked rovers, wheeled rovers, etc. This was attributed to its minimal contact surface with the ground, which is considered particularly important in facilities where loose radioactive particulates are present. By using feet caps and a protective suit, the system can be decontaminated and fully recovered for subsequent redeployments.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121258488","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"AµFLIPS: An Asynchronous Microprocessor With FLexIbly-timed Pipeline Stages","authors":"Zaheer Tabassam, S. R. Naqvi, A. Steininger","doi":"10.1109/ddecs54261.2022.9770113","DOIUrl":"https://doi.org/10.1109/ddecs54261.2022.9770113","url":null,"abstract":"AµFLIPS is an asynchronous microprocessor with novel pipeline register organization to resolve data and control hazards using synchronous hazard resolving schemes. Existing works claim that mechanisms for handling data and control hazards in synchronous systems are not directly applicable to asynchronous pipelined processors, because of distributed control nature of the latter. As a result of that, most asynchronous equivalents of MIPS propose novel hazard resolution methods, adding an overhead in terms of performance and complexity. In this work, we build a counter narrative by proposing a novel pipelined register organization that maintains synchrony with a flexible clock generator instead of the rigid clock, which also allow us to utilize the synchronous hazard resolving methods. Our simulation results – using Balsa – suggest 20.8% improvement in execution time as compared to one of the existing asynchronous processors.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134034364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}