2009 International Conference on Reconfigurable Computing and FPGAs最新文献_第6页

FPGA Implementation of an Elliptic Curve Processor Using the GLV Method 椭圆曲线处理器GLV方法的FPGA实现

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.66

Mark Hamilton, W. Marnane

引用次数: 11

FPGA-Based Online Induction Motor Multiple-Fault Detection with Fused FFT and Wavelet Analysis 基于fpga的感应电机多故障在线检测与FFT和小波分析

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/RECONFIG.2009.9

E. Cabal-Yépez, R. Osornio-Ríos, R. Romero-Troncoso, J. R. Razo-Hernandez, R. Lopez-Garcia

{"title":"FPGA-Based Online Induction Motor Multiple-Fault Detection with Fused FFT and Wavelet Analysis","authors":"E. Cabal-Yépez, R. Osornio-Ríos, R. Romero-Troncoso, J. R. Razo-Hernandez, R. Lopez-Garcia","doi":"10.1109/RECONFIG.2009.9","DOIUrl":"https://doi.org/10.1109/RECONFIG.2009.9","url":null,"abstract":"Online monitoring of rotary machines, like induction motors, can effectively diagnosis electrical and mechanical faults. The origin of most recurrent faults in rotary machines is in the components: bearings, stator, rotor and others. Different methodologies based on current and vibration monitoring have been proposed using FFT and wavelet analysis for preventive monitoring of induction motors resulting in countless techniques for diagnosing specific faults, arising the necessity for a generalized technique that allows multiple fault detection. This work presents a novel methodology and its FPGA implementation for multiple fault online detection analyzing the current and vibration signals of an induction motor combining FFT and wavelet processing during its startup transient and steady state, precisely performing the identification of different faults like misalignment, unbalance, outer-race bearing defects and broken bars. The results obtained using the proposed methodology show its effectiveness providing a precise diagnosis of the induction motor condition.","PeriodicalId":325631,"journal":{"name":"2009 International Conference on Reconfigurable Computing and FPGAs","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128240954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 20

Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow 可在FPGA设计流程中集成的SCA和DFA联合对策

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.50

S. Bhasin, J. Danger, Florent Flament, T. Graba, S. Guilley, Y. Mathieu, Maxime Nassar, L. Sauvage, Nidhal Selmane

{"title":"Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow","authors":"S. Bhasin, J. Danger, Florent Flament, T. Graba, S. Guilley, Y. Mathieu, Maxime Nassar, L. Sauvage, Nidhal Selmane","doi":"10.1109/ReConFig.2009.50","DOIUrl":"https://doi.org/10.1109/ReConFig.2009.50","url":null,"abstract":"The main challenge when implementing cryptographic algorithms in hardware is to protect them against attacks that target directly the device. Two strategies are customarily employed by malevolent adversaries: observation and differential perturbation attacks, also called SCA and DFA in the abundant scientific literature on this topic. Numerous research efforts have been carried out to defeat respectively SCA or DFA. However, few publications deal with concomitant protection against both threats. The current consensus is to devise algorithmic countermeasures to DFA and subsequently to synthesize the DFA-protected design thanks to a DPA-resistant CAD flow. In this article, we put to the fore that this approach is the best neither in terms of performance nor of relevance. Notably, the contribution of this paper is to demonstrate that the strongest SCA countermeasure known so far, namely the dual-rail with precharge logic styles that do not evaluate early, happen surprisingly to be almost natively immune to most DFAs. Therefore, unexpected two-in-one solutions against SCA and DFA indeed exist and deserve a closer attention, because they ally simplicity with efficiency. In particular, we illustrate a logic style, called WDDL without early evaluation (WDDL w/o EE), and a design flow that realizes in practice one possible combined DPA and DFA counter-measure especially suited for reconfigurable hardware.","PeriodicalId":325631,"journal":{"name":"2009 International Conference on Reconfigurable Computing and FPGAs","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128133627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 24

A Fault-Tolerant Layer for Dynamically Reconfigurable Multi-processor System-on-Chip 动态可重构多处理器片上系统的容错层

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.47

H. Pham, S. Pillement, D. Demigny

引用次数: 16

An FPGA-Based Custom High Performance Interconnection Network 基于fpga的自定义高性能互连网络

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.23

M. Nüssle, Benjamin Geib, H. Fröning, U. Brüning

引用次数: 14

Floating Point Hardware for Embedded Processors in FPGAs: Design Space Exploration for Performance and Area fpga中嵌入式处理器的浮点硬件:性能和面积的设计空间探索

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/RECONFIG.2009.26

Taciano A. Rodolfo, Ney Laert Vilar Calazans, F. Moraes

引用次数: 12

FPGA Implementation of the Generalized Hough Transform 广义霍夫变换的FPGA实现

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.78

S. Geninatti, J. Benítez, M. Calviño, Nicolás Guil Mata, Juan Gómez-Luna

引用次数: 17

DPL on Stratix II FPGA: What to Expect? 在Stratix II FPGA上的DPL:期待什么?

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.58

L. Sauvage, Maxime Nassar, S. Guilley, Florent Flament, J. Danger, Y. Mathieu

引用次数: 10

A Novel High-Density Single-Event Upset Hardened Configurable SRAM Applied to FPGA 一种应用于FPGA的高密度单事件强化可配置SRAM

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.13

Lei Wang, Lei Chen, Zhiping Wen, Huabo Sun, Shuo Wang

引用次数: 4

Symmetric Multiprocessor Systems on FPGA 基于FPGA的对称多处理器系统

2009 International Conference on Reconfigurable Computing and FPGAs Pub Date : 2009-12-09 DOI: 10.1109/ReConFig.2009.20

P. Huerta, J. Castillo, C. Pedraza, Javier Cano, J. Martínez

引用次数: 6