2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems最新文献_第8页

Thermal challenges in Photonic Integrated Circuits 光子集成电路中的热挑战

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191810

J. Punch

{"title":"Thermal challenges in Photonic Integrated Circuits","authors":"J. Punch","doi":"10.1109/ESIME.2012.6191810","DOIUrl":"https://doi.org/10.1109/ESIME.2012.6191810","url":null,"abstract":"Photonics Integrated Circuits (PICs), a feature of contemporary optical communications technologies, can represent a stringent packaging challenge, particularly in terms of their requirements for thermal control. Devices such as laser arrays can demonstrate tight temperature limits, sub-ambient operating temperatures, moderate heat loads but high device-level heat fluxes. A key feature of many hybrid PICs is a multi-layer substrate which offers mechanical support, electrical interconnection and heat spreading for the devices that it carries; such substrates are typically mounted on a thermoelectric module (TEM) to achieve thermal control. This paper considers two thermal challenges associated with such PICs, in order to ensure their efficient operation: the requirement for aggressive heat sinking; and the imperative of adequate heat spreading within the substrate on the temperature controlled side of the TEM. To this end, a closed-form electrothermal model is developed for a representative PIC which captures the conductive heat transfer within the substrate, coupled with a constitutive representation of the TEM and its heat sink. An example of a laser array PIC is considered in order to illustrate the importance of heat sinking and spreading. This paper represents some initial results of an extensive programme of work on packaging-related aspects of next-generation PICs.","PeriodicalId":319207,"journal":{"name":"2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128502347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Multi-physics simulation and reliability analysis for LED luminaires under step stress accelerated degradation test LED灯具阶跃应力加速退化试验多物理场仿真及可靠性分析

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191774

Hongyu Tang, D. Yang, G. Zhang, Fengze Hou, M. Cai, Zaifu Cui

{"title":"Multi-physics simulation and reliability analysis for LED luminaires under step stress accelerated degradation test","authors":"Hongyu Tang, D. Yang, G. Zhang, Fengze Hou, M. Cai, Zaifu Cui","doi":"10.1109/ESIME.2012.6191774","DOIUrl":"https://doi.org/10.1109/ESIME.2012.6191774","url":null,"abstract":"In this paper, the 3D model of a LED luminaire is built using the software Pro/Engineer and then the model is transferred to ANSYS Workbench platform where the LED luminaire under the temperature and humidity conditions during step stress accelerated degradation test (SSADT) is simulated. The simulation results of temperature distribution, humidity distribution and stress distribution of the model at three levels of temperature (45°C, 65°C, 85°C) and 60% RH (Relative Humidity) are acquired using multi-physics approach. In the post-processing of temperature data, combining Yamaoshi?s optical power empirial formula of LED degradation with the junction temperature in simulation, the optical decay curves at each stage of the test are obtained. Then, the long-term life test (LTLT) at room temperature (25°C) and SSADT at three levels of temperature are performed to illustrate the validity of simulation. The lumen maintenance of 3 LED luminaires by LTLT and 5 samples by SSADT are analyzed to evaluate the luminous flux, optical decay rate and reliability under different working and ambient conditions. Finally, a comparison is made between the results of experiment and simulation. It is shown that the simulation results agree well with optical decay curves from the test, which indicates that the method can be used to predict the optical decay of LED luminaires.","PeriodicalId":319207,"journal":{"name":"2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131272607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Optimized design and placement of piezoelectric transducers for micromechanical structures subject to membrane stress 薄膜应力作用下微机械结构压电换能器的优化设计与布置

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191753

G. Torri, X. Rottenberg, D. Karabacak, M. Vandecasteele, C. van Hoof, R. Puers, H. Tilmans

引用次数: 4

Thermal modeling of active embedded chip into high density electronic board 有源嵌入式芯片在高密度电子板中的热建模

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191720

C. Dia, E. Monier-Vinard, V. Bissuel, O. Daniel

{"title":"Thermal modeling of active embedded chip into high density electronic board","authors":"C. Dia, E. Monier-Vinard, V. Bissuel, O. Daniel","doi":"10.1109/ESIME.2012.6191720","DOIUrl":"https://doi.org/10.1109/ESIME.2012.6191720","url":null,"abstract":"The recent PWB embedding technology is an attractive packaging alternative that allows a very high degree of miniaturization by stacking multiple core layers of embedded chips, using copper filled micro-vias as interconnections to improve electrical performances. The adoption of disruptive technology in future PWB designs will further increase the thermal management challenges by concentrating heat dissipation at the heart of the organic substrate and exacerbate the need of adequate cooling. In order to allow the electronic designer to early analyse the limits of the power dissipation, depending on the embedded chip location inside the board, as well as the chip thermal interactions with other chips or SMD components, an analytic thermal modelling approach has been established. The presented work describes the comparison of the analytic model results with the numerical detailed models of various embedded chips, and debates about the need or not to simulate in full details the embedded chips as well as the surrounding layers and micro-via structures of the substrate. The thermal behaviour predictions of the analytic model, found to be within ±10% of relative error, demonstrate its relevance to model an embedded chip and its neighbouring heating chips or components. The proposed approach promotes a new practical solution to achieve a more efficient design and to early identify the potential issues of board cooling.","PeriodicalId":319207,"journal":{"name":"2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133205661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Influence of the barrier properties on the mechanical stress and migration distribution in a copper metallization 阻挡层性质对铜金属化过程中机械应力和迁移分布的影响

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191701

J. Kludt, J. Ciptokusumo, K. Weide-Zaage

引用次数: 0

Increasing the robustness for reliable packages by prediction of delamination by cohesive zone element simulation 利用内聚区元模拟预测分层，提高可靠封装的鲁棒性

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191748

R. Pufall, M. Goroll, W. Kanert, R. Dudek

{"title":"Increasing the robustness for reliable packages by prediction of delamination by cohesive zone element simulation","authors":"R. Pufall, M. Goroll, W. Kanert, R. Dudek","doi":"10.1109/ESIME.2012.6191748","DOIUrl":"https://doi.org/10.1109/ESIME.2012.6191748","url":null,"abstract":"Robustness of a package is often proven by performing temperature cycling tests. Thermo-mechanical stress caused by the mismatch of coefficients of thermal expansion (CTE) and temperature variations remains a major concern for the reliability of semiconductor components. This issue is usually addressed by exposing the component to a certain number of cycles, followed by e.g. scanning acoustic microscopy (SAM) to investigate delamination. Discussions about specific cycling conditions, e.g. using -65°C/+175°C instead of -55°C/+150°C for the minimum and maximum temperatures of the cycles or even using liquid-liquid cycling instead of air to air to speed up investigations [1], are often moot, because no real understanding of the effect of the cycling conditions on the component is available. Introducing the parameter adhesion allows the prediction of the delamination behaviour and the possibility to identify critical locations. Furthermore, it seems to be feasible to distinguish between two different failure mechanisms (interface crack propagation and crack initiation) leading to the same failure mode (delamination). Furthermore, it is almost a truism that testing alone does not suffice to ensure the reliability of a component. Reliability has to be built into the components from the beginning. As a consequence, the question should be turned around: It is not enough to look at delamination after a certain number of cycles in a stress test, the questions rather are, how the component should be designed and how the materials should be chosen to prevent delamination. Thus, the focus is changed from measuring delamination to measuring adhesion.","PeriodicalId":319207,"journal":{"name":"2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116202278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Anisotropic strain-field-induced change of the electronic conductivity of graphene sheets and carbon nanotubes 各向异性应变场诱导石墨烯片和碳纳米管电子导电性的变化

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191706

M. Ohnishi, K. Suzuki, H. Miura

引用次数: 0

Residual stresses in isotropic conductive adhesives with nano-Ag particles 纳米银粒子各向同性导电胶粘剂的残余应力

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191707

M. Erinc, M. van Dijk, V. Kouznetsova

引用次数: 3

3D deformation FEM simulations and measurement during VDMOS transistor operation VDMOS晶体管工作过程中三维变形有限元模拟与测量

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191781

E. Marcault, D. Weidmann, A. Bourennane, M. Breil, L. Charpiot

引用次数: 2

Evaluation of adhesion strength of semiconductor package with the Weibull stress 用威布尔应力评价半导体封装的粘接强度

2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems Pub Date : 2012-04-16 DOI: 10.1109/ESIME.2012.6191696

E. Matsuura, K. Sawada, H. Mukaida, H. Aoki, F. Minami

{"title":"Evaluation of adhesion strength of semiconductor package with the Weibull stress","authors":"E. Matsuura, K. Sawada, H. Mukaida, H. Aoki, F. Minami","doi":"10.1109/ESIME.2012.6191696","DOIUrl":"https://doi.org/10.1109/ESIME.2012.6191696","url":null,"abstract":"The idea of the Weibull stress, which is based on the “local approach”, has been applied to delamination failure analyses of semiconductor packages. Interface fracture strengths between package mold resin and 42 alloy lead frame are obtained by a conventional shear test with three resin sizes and two shear heights. Six different facture strengths are converted to a same adhesion strength value which is expressed in terms of the critical Weibull stress. The Weibull stress can be used as non-relative indices of adhesion strengths unaffected by testing conditions. Delamination failures in a TSOP (Thin Small Outline Package) which occur during reflow soldering have been analyzed with the Weibull stress. The Weibull stresses of molded resin in the package at the temperature of reflow soldering are estimated on several spots where either delaminated area or non-delaminated area is distinguished by SAT (Scanning Acoustic Tomograph). Evaluated Weibull stress parameters at delaminated spots exceed the critical Weibull stress which is obtained by the shear test at 240°C. The result is opposite at points where delaminations are not observed. They are smaller than the critical value. This approach can be expected to predict delamination failures in semiconductor packages.","PeriodicalId":319207,"journal":{"name":"2012 13th International Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130716893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1