Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.最新文献

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1/f noise corner modeling 1/f噪声角建模
W.C. Pflanzi, E. Seebacher, Z. Huszka
{"title":"1/f noise corner modeling","authors":"W.C. Pflanzi, E. Seebacher, Z. Huszka","doi":"10.1109/MIXDES.2006.1706551","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706551","url":null,"abstract":"This paper presents a new accurate method for generation of 1/f noise worst cases (WC) based on statistical measurement data. This is implemented in existing state of the art design simulators with a scaled flicker noise model for CMOS. Verification is shown on a noise sensitive analog circuitry as a benchmark for robust flicker noise design. The methodology presented can easily be extended to other devices like BJTs or any other","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125173313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reliable Iris Localization Method With Application To Iris Recognition In Near Infrared Light 可靠的虹膜定位方法及其在近红外光虹膜识别中的应用
K. Grabowski, W. Sankowski, M. Zubert, M. Napieralska
{"title":"Reliable Iris Localization Method With Application To Iris Recognition In Near Infrared Light","authors":"K. Grabowski, W. Sankowski, M. Zubert, M. Napieralska","doi":"10.1109/MIXDES.2006.1706671","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706671","url":null,"abstract":"Iris recognition is accepted as one of the best biometric method. Implementing this method to the practical system requires the special preprocessing where the iris localization plays a crucial role. Iris localization consists of finding the iris boundaries as well as eyelids. In this paper a simple iris localization algorithm is proposed based on iris image segmentation with histogram analysis. Proposed solution was applied for images taken under near infrared light","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125312943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
Digital Programmable gMC-filter In 120nm CMSO Technology 数字可编程gmc -滤波器采用120nm CMSO技术
R. Kolm, H. Zimermann
{"title":"Digital Programmable gMC-filter In 120nm CMSO Technology","authors":"R. Kolm, H. Zimermann","doi":"10.1109/MIXDES.2006.1706584","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706584","url":null,"abstract":"Architecture of a digital programmable gmC-filter with a linearized operational transconductance amplifier (OTA) is proposed. The gain was varied by 2dB in 4 steps, the cut-off-frequency between 250MHz and 350MHz. Experimental results in a standard 120nm CMOS technology are presented. With this topology the measured harmonic distortion of this filter is -44dB for a 400mV peak-to-peak differential output signal","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115536671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Silicon carbide devices and processes - present status and future pers 碳化硅器件和工艺的现状与未来
M. Ostling, H. Lee, M. Domeij, C. Zetterling
{"title":"Silicon carbide devices and processes - present status and future pers","authors":"M. Ostling, H. Lee, M. Domeij, C. Zetterling","doi":"10.1109/MIXDES.2006.1706532","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706532","url":null,"abstract":"Silicon carbide electronic devices are already commercially available in a few application areas such as high voltage rectifiers and emerging RF power amplifiers. Over the past 15 years a very rapid progress of both materials and device quality has been seen and is very encouraging for the near future application market. Prototype devices show amazing improvement each year in all device categories as well as a markedly improved wafer quality. However, materials defect issues are still limiting economically viable production of large area devices with high yield. In this paper a thorough review of progress in SiC device process technology and presents the state-of-the art SiC devices as well as new application areas such as ferroelectric field effect transistors","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117247461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Processing Time And Cross Capacitive Coupling For A Winner Take All Circuit 赢家通吃电路的处理时间和交叉电容耦合
R. Costea, C. Marinov
{"title":"Processing Time And Cross Capacitive Coupling For A Winner Take All Circuit","authors":"R. Costea, C. Marinov","doi":"10.1109/MIXDES.2006.1706633","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706633","url":null,"abstract":"The paper deals with an analog w(inner)-t(ake)-a(ll) network where two input wires are capacitively coupled. The difference between processing times with and without coupling is evaluated by its upper bound. Thus, a performance criterion explicitly expressed as a function of circuit and processing list parameters is obtained","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128422764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Characterization And Simulation Of Silicon Power Devices Up To Very High Temperatures 极高温度下硅功率器件的特性与仿真
P. Borthen, G. Wachutka
{"title":"Characterization And Simulation Of Silicon Power Devices Up To Very High Temperatures","authors":"P. Borthen, G. Wachutka","doi":"10.1109/MIXDES.2006.1706655","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706655","url":null,"abstract":"We investigated and calibrated physically-based high-temperature device models on the basis of measurements and simulations of industrial power MOSFETs and non-punch through (NPT) 600V IGBTs (both from Infineon AG) in a temperature range from room temperature up to 750 K","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123386873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Web Based System For Archive And Management Theses 基于Web的论文归档与管理系统
J. Wisnicka, M. Wójtowski, K. Slusarczyk
{"title":"Web Based System For Archive And Management Theses","authors":"J. Wisnicka, M. Wójtowski, K. Slusarczyk","doi":"10.1109/MIXDES.2006.1706698","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706698","url":null,"abstract":"The subject of the article is an application which stores the information about defences of master and bachelor theses, allows reviewing and convenient managing them. This application was implemented with use of Apache Struts","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123617114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fully Differential Rail-to-rail Input Opamp With Novel Constant-transconductance Control In 120nm CMOS Technology 采用120nm CMOS技术的新型恒跨导控制的全差分轨对轨输入运放
W. Yan, H. Zimmermann
{"title":"Fully Differential Rail-to-rail Input Opamp With Novel Constant-transconductance Control In 120nm CMOS Technology","authors":"W. Yan, H. Zimmermann","doi":"10.1109/MIXDES.2006.1706587","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706587","url":null,"abstract":"A fully differential operational amplifier featured with rail-to-rail input and output performance, realized by a novel method of constant small- and large-signal behavior control as well as a new symmetrical differential class-AB output is proposed. The small-signal deviation is suppressed within only 1.6%, which is the best result achieved among all the constant behavior rail-to-rail input-stage designs. With suitable compensation, the opamp is able to drive heavy ohmic load down to 100ohm or capacitive load higher than 50pF. Also the total harmonic distortion is reduced owing to the symmetrical push-pull structure for the output stage. With a 1.5V power supply and a capacitive load of 10pF, the low-frequency gain and unity-gain bandwidth of the opamp are 77dB and 4.7MHz, respectively. The chip was fabricated in 120nm digital CMOS technology","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"9 12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121401517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Digital Method Of Phase Shift Measuring 相移测量的数字方法
R. Ivantsiv, U. Maricutsa, T. Sviridova, M. Lobur
{"title":"Digital Method Of Phase Shift Measuring","authors":"R. Ivantsiv, U. Maricutsa, T. Sviridova, M. Lobur","doi":"10.1109/MIXDES.2006.1706644","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706644","url":null,"abstract":"The devices used for measuring the phase shift have been reviewed in this article. The measurement fault of the phase shift with the value 3deg for the frequency 30 kHz at the quantization frequency value 100 mHz has been defined; the structural scheme of the phase meter with frequency multiplier for 36 has been suggested","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132521400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Hardware Realization Of The MPEG-7 Edge Histogram Descriptor MPEG-7边缘直方图描述符的硬件实现
R. Kapela, A. Rybarczyk, P. Sniatala, R. Rudnicki
{"title":"Hardware Realization Of The MPEG-7 Edge Histogram Descriptor","authors":"R. Kapela, A. Rybarczyk, P. Sniatala, R. Rudnicki","doi":"10.1109/MIXDES.2006.1706669","DOIUrl":"https://doi.org/10.1109/MIXDES.2006.1706669","url":null,"abstract":"The paper presents hardware implementation of the MPEG-7 edge histogram descriptor. The testing circuit was described using VHDL language and synthesized into FPGA. The RC1000 board with a Xilinx Virtex V1000 FPGA was chosen as the target platform. Experimental results of the descriptor efficiency are presented too","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130002476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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