SPIE Photomask Technology最新文献

{"title":"3D mask modeling with oblique incidence and mask corner rounding effects for the 32nm node","authors":"M. Saied, F. Foussadier, J. Belledent, Y. Trouiller, I. Schanen, E. Yesilada, C. Gardin, J. Urbani, F. Sundermann, F. Robert, C. Couderc, F. Vautrin, Laurent LeCam, G. Kerrien, J. Planchot, C. Martinelli, B. Wilkinson, Y. Rody, A. Borjon, N. Morgana, J. Di-Maria, V. Farys","doi":"10.1117/12.752613","DOIUrl":"https://doi.org/10.1117/12.752613","url":null,"abstract":"The perpetual shrinking in critical dimensions in semiconductor devices is driving the need for increased resolution in optical lithography. Increasing NA to gain resolution also increases Optical Proximity Correction (OPC) model complexity. Some optical effects which have been completely neglected in OPC modeling become important. Over the past few years, off-axis illumination has been widely used to improve the imaging process. OPC models which utilize such illumination still use the thin film mask approximation (Kirchhoff approach), during optical model generation, which utilizes a normal incidence. However, simulating a three dimensional mask near-field using an off-axis illumination requires OPC models to introduce oblique incidence. In addition, the use of higher NA systems introduces high obliquity field components that can no longer be assimilated as normal incident waves. The introduction of oblique incidence requires other effects, such as corner rounding of mask features, to be considered, that are seldom taken into account in OPC modeling. In this paper, the effects of oblique incidence and corner rounding of mask features on resist contours of 2D structures (i.e. line-ends and corners) are studied. Rigorous electromagnetic simulations are performed to investigate the scattering properties of various lithographic 32nm node mask structures. Simulations are conducted using a three dimensional phase shift mask topology and an off-axis illumination at high NA. Aerial images are calculated and compared with those obtained from a classical normal incidence illumination. The benefits of using an oblique incidence to improve hot-spot prediction will be discussed.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121587981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Improving inspectability with KLA-Tencor TeraScan thin line de-sense","authors":"Chunlin Chen, David Kim, K. Park, N. Kim, S. Han, Jin Hyung Park, Dong-Hoon Chung","doi":"10.1117/12.747180","DOIUrl":"https://doi.org/10.1117/12.747180","url":null,"abstract":"In the ever-changing semi-conductor industry, new innovations and technical advances constantly bring new challenges to fabs, mask-shops and vendors. One of such advances is an aggressive optical proximity correction (OPC) method, sub-resolution assist features (SRAF). On one hand, SRAFs bring a leap forward in resolution improvement during wafer printing; on the other hand they bring new challenges to many processes in mask making. KLA-Tencor Corp. working together with Samsung Electronics Co. developed an additional function to the current HiRes 1 detector to increase inspectability and usable sensitivity during the inspection step of the mask making process. SRAFs bring an unique challenge to the mask inspection process, which mask shops had not experienced before. SRAF by nature do not resolve on wafer and thus have a higher tolerance in the CD (critical dimension) uniformity, edge roughness and pattern defects. This new function, Thin-Line De-sense (TLD), increase the inspectability and usable sensitivity by generating different regions of sensitivity and thus will match the defect requirement on a particular photomask with SRAFs better. The value of TLD was proven in a production setting with more than 30 masks inspected, and resulted in higher sensitivity on main features and a sharp decrease in the amount of defects that needed to be classified.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":" 58","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120827091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Sensitivity comparison of fast integrated die-to-die T+R pattern inspection, standard database inspection, and STARlight2 contamination mode for application in mask production","authors":"Heiko Schmalfuss, T. Schulmeyer, J. Heumann, M. Lang, Jean-Paul Sier","doi":"10.1117/12.747164","DOIUrl":"https://doi.org/10.1117/12.747164","url":null,"abstract":"'Fast Integrated Die-to-Die T+R' pattern inspection (DDTR), reflected tritone database inspection (DBRt) and STARlight2TM (SL2) contamination inspection are employed by mask makers in order to detect pattern defects and contamination defects on photomasks for in process inspection steps. In this paper we compare the detection capabilities of these modes on real production masks with a representative set of contamination and pattern defects. Currently, SL2 inspection is used to find contamination defects and die-to-die and die-to-database are used for pattern defects. In this paper we will show that the new introduced 'Fast Integrated Die-to-Die T+R' pattern inspection (DDTR)1 in combination with the DBRt can be used in production environment, instead of SL2 without any loss in the sensitivity. During the study, we collected and analyzed inspection data on critical layers such as lines & spaces and contact holes. Besides, performance of the modes on product plates characterization was done using a test mask with programmed defects.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130063702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Automatic OPC repair flow: optimized implementation of the repair recipe","authors":"M. Bahnas, M. Al-Imam, J. Word","doi":"10.1117/12.746950","DOIUrl":"https://doi.org/10.1117/12.746950","url":null,"abstract":"Virtual manufacturing that is enabled by rapid, accurate, full-chip simulation is a main pillar in achieving successful mask tape-out in the cutting-edge low-k1 lithography. It facilitates detecting printing failures before a costly and time-consuming mask tape-out and wafer print occur. The OPC verification step role is critical at the early production phases of a new process development, since various layout patterns will be suspected that they might to fail or cause performance degradation, and in turn need to be accurately flagged to be fed back to the OPC Engineer for further learning and enhancing in the OPC recipe. At the advanced phases of the process development, there is much less probability of detecting failures but still the OPC Verification step act as the last-line-of-defense for the whole RET implemented work. In recent publication the optimum approach of responding to these detected failures was addressed, and a solution was proposed to repair these defects in an automated methodology and fully integrated and compatible with the main RET/OPC flow. In this paper the authors will present further work and optimizations of this Repair flow. An automated analysis methodology for root causes of the defects and classification of them to cover all possible causes will be discussed. This automated analysis approach will include all the learning experience of the previously highlighted causes and include any new discoveries. Next, according to the automated pre-classification of the defects, application of the appropriate approach of OPC repair (i.e. OPC knob) on each classified defect location can be easily selected, instead of applying all approaches on all locations. This will help in cutting down the runtime of the OPC repair processing and reduce the needed number of iterations to reach the status of zero defects. An output report for existing causes of defects and how the tool handled them will be generated. The report will with help further learning and facilitate the enhancement of the main OPC recipe. Accordingly, the main OPC recipe can be more robust, converging faster and probably in a fewer number of iterations. This knowledge feedback loop is one of the fruitful benefits of the Automatic OPC Repair flow.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121901443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"32nm half pitch node OPC process model development for three dimensional mask effects using rigorous simulation","authors":"L. Melvin, T. Schmoeller, Jianliang Li","doi":"10.1117/12.746229","DOIUrl":"https://doi.org/10.1117/12.746229","url":null,"abstract":"32 nm half-pitch node processes are rapidly approaching production development, but most tools for this process are currently in early development. This development state means that significant data sets are not yet readily available for OPC development. However, several physical mask effects are predicted to become more prominent at the 32 nm half-pitch node. One of the most significant effects is the three dimensional (3D) mask effects where the mask transmittance and phase are impacted by the mask topography. Already at larger process nodes this effect impacts imaging performance, especially when sub-resolution assist features are employed. For the 32nm node it is essential that this effect is correctly captured by the OPC model. As wafer data for the 32nm half-pitch is difficult to obtain, the use of rigorous lithography process simulation has proven to be invaluable in studying this effect. Using rigorous simulation, data for OPC model development has been generated that allows the specific study of 3D mask effect calibration. This study began with Kirchhoff based simulations of 32 nm node features which were calibrated into Hopkin's based OPC process models. Once the standard Kirchhoff effects were working in the OPC model, 3D mask effects were included for the same data by performing fully rigorous electromagnetic field (EMF) simulations on the mask.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133193491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Model-based mask verification","authors":"F. Foussadier, F. Sundermann, A. Vacca, J. Wiley, George Chen, T. Takigawa, K. Hayano, S. Narukawa, S. Kawashima, H. Mohri, N. Hayashi, H. Miyashita, Y. Trouiller, F. Robert, F. Vautrin, G. Kerrien, J. Planchot, C. Martinelli, J. Di-Maria, V. Farys","doi":"10.1117/12.752609","DOIUrl":"https://doi.org/10.1117/12.752609","url":null,"abstract":"One of the most critical points for accurate OPC is to have accurate models that properly simulate the full process from the mask fractured data to the etched remaining structures on the wafer. In advanced technology nodes, the CD error budget becomes so tight that it is becoming critical to improve modeling accuracy. Current technology models used for OPC generation and verification are mostly composed of an optical model, a resist model and sometimes an etch model. The mask contribution is nominally accounted for in the optical and resist portions of these models. Mask processing has become ever more complex throughout the years so properly modeling this portion of the process has the potential to improve the overall modeling accuracy. Also, measuring and tracking individual mask parameters such as CD bias can potentially improve wafer yields by detecting hotspots caused by individual mask characteristics. In this paper, we will show results of a new approach that incorporates mask process modeling. We will also show results of testing a new dynamic mask bias application used during OPC verification.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123867363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Self-aligned resist patterning with 172nm and 193nm backside flood exposure on attenuated phase shift masks","authors":"J. Chun, Tae-Joong Ha, Ho-Yong Jung, S. Jo, O. Han","doi":"10.1117/12.746638","DOIUrl":"https://doi.org/10.1117/12.746638","url":null,"abstract":"We have investigated self-aligned resist patterning for a patterning accuracy of photo mask. Self-aligned resist pattern can be formed by backside flood exposure on photo-mask. It had been already proved by the experiments with 248 nm light source exposure on binary (Cr on Quartz) and KrF attenuated phase shift masks. Attenuated phase shift masks are generally composed of Cr/MoSiN/Quartz, MoSiN/Quartz, and Quartz layers. MoSiN layers of attenuated phase shift mask have the optical property of 6% transmittance at 248 nm light source, and the interference of the 6%- transmitted light makes the undesirable resist pattern profile on MoSiN-Quartz boundary. This paper shows the fresh possibility of the self-aligned resist pattern fabrication on attenuated phase shift masks using backside flood exposure. To solve the optical property of MoSiN layer, self-aligned resist patterns of KrF attenuated phase shift mask was fabricated using 193 nm wavelength backside flood exposure and ArF attenuated phase shift mask used 172 nm wavelength. The shorter wavelength than generally applied wavelength could minimize transmittance on MoSiN area. Besides we used Negative PR to make the self-aligned resist pattern on exposed regions. These experimental concepts help to form the selective PR patterning on only quartz regions of attenuated phase shift mask.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126186926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Mask rule check using priority information of mask patterns","authors":"Kokoro Kato, Y. Taniguchi, Kuninori Nishizawa, Masakazu Endo, Tadao Inoue, Ryouji Hagiwara, Anto Yasaka","doi":"10.1117/12.746549","DOIUrl":"https://doi.org/10.1117/12.746549","url":null,"abstract":"Association of Super-Advanced Electronics Technologies (ASET) has started a project called \"Mask Design, Drawing and Inspection Technology (MaskD2I)\" with the sponsorship from The New Energy and Industrial Technology Development Organization (NEDO) since 2006. SIINT has joined the MaskD2I project and we have been developing MRC software considering DFM information for more effective data verification. By converting design level information called as \"Design Intent\" to the priority information of mask manufacturing data called as \"Mask Data Rank (MDR)\", the MRC process based on the importance of reticle patterns is possible. Our main purpose is to build a novel data checking flow with the priority information of mask patterns extracted from the design intent. In this paper, we address the effectiveness of MRC technologies which have been widely applied in many mask data fields. Then we present the current status of the new MRC development, its experimental results so far and the future outlook using further Design Aware Manufacturing (DAM) information.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114158021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Application of modified jog-fill DRC rule on LFD OPC flow","authors":"Youngmi Kim, Sang-Uk Lee, Jea-Hyun Kang, Jea-hee Kim, Keeho Kim","doi":"10.1117/12.746811","DOIUrl":"https://doi.org/10.1117/12.746811","url":null,"abstract":"The methodology of lithography friendly design (LFD) has been widely adopted since it dramatically reduces cycle of design revision as well as number of learning cycles to reach acceptable yield. LFD is, for example, the reduction number of small jogs and notches in original, pre-OPC layouts. We can call them as OPC-unfriendly patterns since they create unnecessarily complicated OPC patterns. They usually meet design rule so that DRC does not detect or screen them out. Also, they make many errors after OPC because OPC model recognizes just as one of small features that it should care. This generates many false alarms at OPC verification and mask rule check. General approach to implement LFD is to update rule table or design rule by taking actual yield and failure analysis data into consideration of database handling flow. Another method is the utilization of simulation to predict lithography unfriendly designs. It takes time to setup excellent rule for accurate prediction even if they are very good approach as fundamental solution for LFD. It will be better to have a simple solution with fast setup and improvement on major lithography unfriendly designs such as small jogs and notches. In this paper, we proposed new type of LFD flow which is the application of modified DRC step on LFD flow. This modified DRC identifies OPC-unfriendly patterns, and changes to \"OPC-friendly\" as well as fixing design rule violations. It is a pre-OPC layout treatment to remove small jogs and notches. After finding small jogs or notches, DRC software removes jogs and notches. In this case, unnecessary OPC fragments could be avoided. Using this jog-fill technique, we can dramatically reduce the incidence of necking or bridging, improve contact coverage, and, as a result, it enhances the final yield and reliability of circuit.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130259379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Industry survey of wafer fab reticle quality control strategies in the 90nm-45nm design-rule age","authors":"R. Dover","doi":"10.1117/12.745389","DOIUrl":"https://doi.org/10.1117/12.745389","url":null,"abstract":"Reticle quality control in wafer fabs is different from quality control in mask shops. Mask shop requirements are typically inspectability of mask-type, resolution and sensitivity, with the latter usually being the most important. Mask shop sensitivity requirements are also fairly absolute. All defects or imperfections of a certain specification have to be found 100 percent of the time, every time. Wafer fab requirements are an interplay between inspectability, sensitivity, and the economic cost of inspection versus the economic risk of not inspecting. Early warning and defect signatures versus absolute capture of all defects is a key distinction between wafer fabs and mask shops. In order to better understand the different strategies and approaches taken by wafer fabs for reticle quality control an industry-wide benchmark survey of leading wafer fabs was undertaken. This paper summarizes the results while retaining the different wafer fabs' anonymity and confidentiality. The approach taken for the survey was specifically designed to be impartial and independent of any tools, solutions or applications available from KLA-Tencor.","PeriodicalId":308777,"journal":{"name":"SPIE Photomask Technology","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128335059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}