{"title":"Efficient elementary function generation with multipliers","authors":"H. Ahmed","doi":"10.1109/ARITH.1989.72809","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72809","url":null,"abstract":"Virtually all numerical techniques for elementary function generation share the common property of avoiding multiplication by iteratively performing shift operations. However, with the advent of VLSI, multiplier economics are considerably less formidable than before. The author proposes combining multipliers with these multiplication-free algorithms to construct fast methods of elementary function generation. He demonstrates the idea by combining multipliers with the CORDIC algorithm to achieve fast vector rotation.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129002042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Incompletely specified numbers in the residue number system-definition and applications","authors":"D. Gamberger","doi":"10.1109/ARITH.1989.72828","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72828","url":null,"abstract":"Incompletely specified numbers in the residue number system (RNS) are defined in order to make multiplicative inverse computation of a number regardless of its magnitude possible. Incompletely specified RNS is the general RNS model in which completely specified numbers are the special case. Two efficient algorithms for transformation of incompletely to completely specified RNS numbers are shown. Examples of their application in divisibility testing and integer matrix inversion are described.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"133 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124253797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A software implementation of SLI arithmetic","authors":"P. Turner","doi":"10.1109/ARITH.1989.72805","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72805","url":null,"abstract":"An implementation of the symmetric level-index (SLI) system, some of its special features, and some computational experience with it are described. The particular implementation discussed was developed for use on IBM-compatible PC machines and is written in Turbo Pascal. This allows many of the attractive features of a potential hardware implementation of SLI arithmetic to be readily incorporated. The ease of performing extended computational operations, such as scalar products and evaluation of polynomials, is evident from the package. The computational experiments reported also show the great simplicity of program structure which this robust arithmetic permits.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132320921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the efficient implementation of higher radix square root algorithms","authors":"P. Montuschi, L. Ciminiera","doi":"10.1109/ARITH.1989.72821","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72821","url":null,"abstract":"Square root nonrestoring algorithms operating with a radix higher than two (but power of 2) are discussed. Formulas are derived delimiting the feasibility space of the class of algorithms considered as a function of the different parameters. This definition leads to the determination of some of these parameters; in particular, it is possible to compute the number of partial reminder bits to be inspected for digit selection and the number of operand bits to be inspected to generate the first radicand value, as both parameters have a relevant impact on the implementation. The specific case of radix 4, digit set (-2, -1, 0, +1, +2) and partial remainder represented by the sum of two numbers is considered.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126423690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Lexicographic encoding of numeric data fields","authors":"N. Rishe","doi":"10.1109/ARITH.1989.72832","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72832","url":null,"abstract":"A method of variable-radix representation of numeric data is presented. The method allows compact representation of arbitrary numbers. Among its properties is that bitwise lexicographic comparison (>, <) is consistent with correct numeric comparison of numbers.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123783794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis and design of CMOS Manchester adders with variable carry-skip","authors":"P. K. Chan, M. Schlag","doi":"10.1109/ARITH.1989.72813","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72813","url":null,"abstract":"A popular VLSI adder implementation is the Manchester adder using dynamic (precharge) logic, where the ripple-carry propagation delay of a block is proportional to the square of its size. The authors examine two different CMOS implementations of the Manchester adder, analyzing them with the RC timing model, which provides a unified way of analyzing both CMOS circuits and interconnect. Based on the RC timing model, they develop efficient (polynomial) algorithms to determine near-optimal, as well as optimal, block sizes for the one-level Manchester adder with variable carry-skip.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127271970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"theta (logN) architectures for RNS arithmetic decoding","authors":"K. Elleithy, M. Bayoumi, K. P. Lee","doi":"10.1109/ARITH.1989.72827","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72827","url":null,"abstract":"Decoding in residue-number-system (RNS)-based architectures can be a bottleneck. A high-speed, flexible modulo decoder is an essential computational element to maintain the advantages of RNS. A fast and flexible modulo decoder, based on the Chinese remainder theorem (CRT), is presented. It decodes a set of residues into its equivalent representation in either unsigned magnitude or two's-complement binary number system. Two different architectures are analyzed: the first one uses carry-save adders, and the other uses modified structure carry-save adders. Both architectures are modular and are based on simple cells, which leads to efficient VLSI implementation. The decoder has a time complexity of theta (log N).<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"425 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114890564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Higher radix floating point representations","authors":"P. Johnstone, F. Petry","doi":"10.1109/ARITH.1989.72818","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72818","url":null,"abstract":"An examination is made of the feasibility of higher-radix floating-point representations and, in particular, decimal-based representations. Traditional analyses of such representations have assumed the format of a floating-point datum to be roughly identical to that of traditional binary floating-point encodings such as the IEEE P754 task group standard representations. The authors relax this restriction and propose a method of encoding higher-radix floating-point data with range, precision, and storage requirements comparable to those exhibited by traditional binary representations. The results of other authors are extended to accommodate the proposed representation. A decimal alternative to traditional binary representations is proposed, and the behavior of such a system is contrasted with that of a comparable binary system.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121730483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Contiguous digit sets and local roundings","authors":"M. Petkovšek","doi":"10.1109/ARITH.1989.72819","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72819","url":null,"abstract":"The paper shows that certain interesting properties of roundings and representations hold at a fairly general level. The author restricts his attention to roundings of real numbers. He defines roundings by means of two parameters for each basic interval of the screen. These parameters determine the dividing point of the interval and the direction in which the dividing point moves under rounding. He shows that radix systems in which truncation and lexicographic ordering obey natural monotonicity conditions can be characterized as systems with contiguous digit sets. An examination is made of the interplay of roundings and representations.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116526142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Algorithm for high speed shared radix 8 division and radix 8 square root","authors":"J. Fandrianto","doi":"10.1109/ARITH.1989.72811","DOIUrl":"https://doi.org/10.1109/ARITH.1989.72811","url":null,"abstract":"An algorithm for performing radix-8 division and square root in a shared hardware is described. To achieve short iteration cycle time, it utilizes an optimized 'next quotient/root prediction PLA' generally used in a radix-4 SRT division with minimal redundancy. In addition, the partial remainder, partial radicand, quotient, and root are generated and saved in redundant forms, thereby eliminating the slow-carry look-ahead adder from the critical path timing of the iteration cycle. This method successfully avoids the need to generate nontrivial divisor/root multiples (3x, 5x, etc.) and also avoids the complex radix-8 next quotient prediction PLA typically used in a conventional radix-8 SRT division. It also shows that a significant amount of hardware sharing can be achieved when square root and division are performed at the same radix.<<ETX>>","PeriodicalId":305909,"journal":{"name":"Proceedings of 9th Symposium on Computer Arithmetic","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121801413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}