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Proceedings. VLSI and Computer Peripherals. COMPEURO 89最新文献

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Chemical sensing and pattern recognition 化学传感和模式识别
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93406
R. Muller
{"title":"Chemical sensing and pattern recognition","authors":"R. Muller","doi":"10.1109/CMPEUR.1989.93406","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93406","url":null,"abstract":"Most conventional chemosensors exhibit a rather limited selectivity. The use of a sensor array together with proper signal processing makes it possible to achieve a high, electronically controllable selectivity. Different approaches to this technique are described, together with experimental results. Also discussed is the impact of this pattern-recognition method on the development of sensor elements. It is predicted that the trend to build arrays will increase. Since in many cases the packaging, heating, etc. take more space and cost that the actual sensor element, an array must not necessarily be much more expensive and larger than a single element.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133259626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A functionally distributed-program kernel for embedded real-time multiprocessor systems 嵌入式实时多处理器系统的功能分布式程序内核
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93467
J. Cooling, S. Al-Khayatt
{"title":"A functionally distributed-program kernel for embedded real-time multiprocessor systems","authors":"J. Cooling, S. Al-Khayatt","doi":"10.1109/CMPEUR.1989.93467","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93467","url":null,"abstract":"A kernel designed to manage programs that are distributed in a real-time multiprocessor system is described. Unlike many scientific and commercial applications, it is not intended to support fragmented programs. Instead, the basis for the design is functional partitioning. The system is loosely coupled and composed of a number of stations (nodes) linked together through a communication bus. Each node consists of two sections: (1) the main processor section (holding the application programs and the kernel) and (2) the communications section (providing a transparent interface between the main processors of the system).<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131679202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
VLSI chips supporting parallel bus interfacing and bus management 支持并行总线接口和总线管理的VLSI芯片
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93450
J. Zahn
{"title":"VLSI chips supporting parallel bus interfacing and bus management","authors":"J. Zahn","doi":"10.1109/CMPEUR.1989.93450","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93450","url":null,"abstract":"Several parallel-backplane buses have been standardized in the last years, each having a different bus structure. A number of VLSI interface chips are now available, especially for the widespread VME bus, each representing different levels and types of functionality. The author presents an overview of their features.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"162 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114573686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Intelligent control valve 智能控制阀
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93404
B. Tovornik, D. Donlagic, N. Muškinja
{"title":"Intelligent control valve","authors":"B. Tovornik, D. Donlagic, N. Muškinja","doi":"10.1109/CMPEUR.1989.93404","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93404","url":null,"abstract":"A control valve is a very expensive part of a control loop; its implementation requires a high level of mechanical treatment. The authors indicate how computer technology simplifies and reduces in price the expensive classic realizations (implementations) of the control valve. They indicate the possibilities and some kinds of solutions and present experimental results and practical implementations for some of these solutions. The microprocessor-controlled valve is able to take over a part of the controller's function, especially when the controller alone is not able to remove a large disturbance.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114722306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A programmable systolic device for quadratic surface generation 二次曲面生成的可编程收缩装置
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93390
B. Pham, H. Schroder
{"title":"A programmable systolic device for quadratic surface generation","authors":"B. Pham, H. Schroder","doi":"10.1109/CMPEUR.1989.93390","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93390","url":null,"abstract":"Systolic array architectures are favorable for special-purpose systems, as they are simple and offer a high degree of concurrency. Here, a programmable systolic device is designed to cater for the two basic tasks-subdivision and curve generation-in free-form design using quadratic B-splines. The design consists of a systolic memory matrix accessible via a rotation operation by a linear array of simple processing elements. The processing elements used are sufficiently small and simple to allow a large number of processing elements to be incorporated in the design. In particular, it is technically feasible to have as many processing elements as the number of rows on the screen.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116486555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Making radiation sensors smart enough for computers 为计算机制造足够智能的辐射传感器
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93410
S. A. Audet, S. Wouters, M.H. Kim, E. Schooneveld
{"title":"Making radiation sensors smart enough for computers","authors":"S. A. Audet, S. Wouters, M.H. Kim, E. Schooneveld","doi":"10.1109/CMPEUR.1989.93410","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93410","url":null,"abstract":"The physical operation of nuclear radiation sensors is briefly reviewed. This is followed by a description of a typical experimental measurement-system setup, which can be divided into two parts: the application-specific part (including the detector and its associated electronics) and the computer-interfaced part (consisting of a multichannel analyzer). A number of recent improvements in the system design are discussed, followed by an extended description of one of the most promising new ideas, the monolithic integration of both the radiation sensor and its associated electronics on one high-ohmic silicon substrate. The results prove to be a stimulus for making radiation sensors smart enough for computers.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123965933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A VLSI magnetic/magneto-optical detection channel 一种超大规模集成电路磁/磁光探测通道
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93355
D. G. East
{"title":"A VLSI magnetic/magneto-optical detection channel","authors":"D. G. East","doi":"10.1109/CMPEUR.1989.93355","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93355","url":null,"abstract":"Emphasis has shifted from the use of magnetic storage subsystems in support of computer-assisted clerical operations toward data logging/data acquisition, storage and manipulation of noncoded information, and personal-computer applications. More stringent demands are being made on all aspects of storage subsystem performance, including capacity, accessibility, reliability, and economy. A VLSI detection channel is described which is key to meeting these demands. Recent work indicates the feasibility of designing adaptive networks which learn and respond to changes in the signaling environment. Signal-processing functions and computational or storage capabilities which are practical at VLSI circuit densities are the means by which multiple measures of value to the customer are increased.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129847932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of the waveform-relaxation-method to determine reflection- and crosstalk noise on signal lines 用波形松弛法测定信号线上的反射噪声和串扰噪声
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93490
W. John, W. Rissiek
{"title":"Application of the waveform-relaxation-method to determine reflection- and crosstalk noise on signal lines","authors":"W. John, W. Rissiek","doi":"10.1109/CMPEUR.1989.93490","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93490","url":null,"abstract":"An implementation for transient simulation of coupled transmission lines is presented. The implemented model is based on the normal-mode analysis for general multiple coupled transmission lines. The described model is implemented in the waveform-relaxation simulator SISAL for general purpose applications. By partitioning circuits into independent subcircuits, a local time-step control is facilitated, allowing a fast evaluation of systems with coupled transmission lines. It is shown that a simulation-time reduction up to a factor of four is obtained relative to SPICE (2G.6/cadlab version). The extension to SISAL gives the printed-circuit-board and IC designer control over reflection and crosstalk phenomena.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127235622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 1-micron CMOS 128 MHz video serialiser, palette, and digital-to-analogue (DAC) chip 一个1微米CMOS 128 MHz视频串行器、调色板和数模转换器(DAC)芯片
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93358
M.J. Chesters
{"title":"A 1-micron CMOS 128 MHz video serialiser, palette, and digital-to-analogue (DAC) chip","authors":"M.J. Chesters","doi":"10.1109/CMPEUR.1989.93358","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93358","url":null,"abstract":"Summary form only given. The author describes a fully integrated 1- mu m CMOS video serializer, color palette, and digital-to-analog converter (DAC) chip, which is being designed as a key component for a personal computer graphics system. One application for this chip is in the IBM Image Adapter/A. The chip drives high-resolution monitors up to 1600 by 1200 pixels at 128-MHz video frequency with 8 bits/pixel. It offers a palette of 256 colors selectable from a possible 16 million colors. The design represents the state of the art in mixed analog and digital CMOS design. The design tools and methodology were chosen to minimize the design time and provide right-first-time hardware. The key features are a high-performance 256*24 palette RAM, three 8-bit DACs, a reconfigurable video serializer, and approximately 6 K (equivalent) gates of standard-cell logic to manage the control and interfacing of the chip.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130852542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Time delay and integration imagers and their applications to image acquisition cameras 延时集成成像仪及其在图像采集相机中的应用
Proceedings. VLSI and Computer Peripherals. COMPEURO 89 Pub Date : 1989-05-08 DOI: 10.1109/CMPEUR.1989.93395
Y. Yao, E. S. Schlig, F. Giordano
{"title":"Time delay and integration imagers and their applications to image acquisition cameras","authors":"Y. Yao, E. S. Schlig, F. Giordano","doi":"10.1109/CMPEUR.1989.93395","DOIUrl":"https://doi.org/10.1109/CMPEUR.1989.93395","url":null,"abstract":"A family of experimental time-delay and integration (TDI) charge-coupled imaging devices has been designed and built using a minimally-modified logic/memory NMOS process. These imagers yield more favorable tradeoffs between image quality, speed, and illumination than conventional linear imagers and are suitable for high-speed scanning of color or monochrome documents at low illumination power. The design and construction of a prototype scanning camera using the 3072*32 TDI devices is also described. Intended for publishing applications, the camera is capable of capturing both monochrome and color images. At half-page document size, the scanning resolution is 300 pixels/in. Special color filters are used to produce colorimetric outputs. Both reflective and transmissive illumination are provided to scan both prints and transparencies of various sizes.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123376387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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