发布求助
文献互助 智能选刊 最新文献

Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献

筛选
英文 中文
Study on light sensitive functional failures in VLSI failure analysis VLSI失效分析中光敏功能失效的研究
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599151
Gaojie Wen, Diwei Fan, Li Tian, Chunlei Wu, Miao Wu, Winter Wang
{"title":"Study on light sensitive functional failures in VLSI failure analysis","authors":"Gaojie Wen, Diwei Fan, Li Tian, Chunlei Wu, Miao Wu, Winter Wang","doi":"10.1109/IPFA.2013.6599151","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599151","url":null,"abstract":"Functional failures which were sensitive to temperature or voltage were usually seen in failure analysis and many strategies have been employed to solve this kind of failure. But some special failed ICs which were sensitive to light post decapsulation were difficult to handle. Three light sensitive functional failure cases were presented in this paper to show how we can find the root cause efficiently and what kind of mechanism lead to them sensitive to light.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130823126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Failure localization methods for system-on-chip (SoC) using photon emission microscopy 基于光子发射显微镜的片上系统(SoC)故障定位方法
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599230
Y. Chen, H. Chen, X. Zhang, P. Lai
{"title":"Failure localization methods for system-on-chip (SoC) using photon emission microscopy","authors":"Y. Chen, H. Chen, X. Zhang, P. Lai","doi":"10.1109/IPFA.2013.6599230","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599230","url":null,"abstract":"System-on-Chip (SoC) is a major revolution in IC design where the whole functionality of a system is placed on a single chip. Its advantages include high performance, shorter design cycle time and space efficiency. But due to the circuit complexity, the high pin counts and ever increasing operating frequencies, System-on-Chip (SoC) devices drive the most challenging requirements for failure localization and mechanism analysis. PEM (Photon Emission Microscopy) analysis is important for failure analysis as they can help to locate the failed device directly or point out the analysis direction. This paper presents the failure localization method for System-on-Chip (SoC) using Photon Emission Microscope (PEM) and gives several successful failure analysis cases using PEM locating the failure site and FIB (Focused Ion Beam) and SEM (Scanning electronic Microscope) analyzing the failure mechanism.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132941142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Uniform delayering of copper metallization 铜金属化均匀分层
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599147
Y. W. Siah, Y. Hong, Q. Liu, H. Kor, C. Gan
{"title":"Uniform delayering of copper metallization","authors":"Y. W. Siah, Y. Hong, Q. Liu, H. Kor, C. Gan","doi":"10.1109/IPFA.2013.6599147","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599147","url":null,"abstract":"Integrated circuit chips of newer technology usually have a larger die size and an increase number of metallization. Hence, pure usage of polishing to remove the layers would induce severe edge rounding. An alternative method is proposed to decrease the polishing time for copper metallization removal while reducing edge rounding on the sample during sample preparation that will preserve the integrity of the layers for further failure analysis.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128847034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Study on low silver Sn-Ag-Cu-P alloy for wave soldering 波峰焊用低银Sn-Ag-Cu-P合金的研究
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599206
Junjie Wang, Xi-cheng Wei, Wenqi Zhu, Jian Wu, N. Wu
{"title":"Study on low silver Sn-Ag-Cu-P alloy for wave soldering","authors":"Junjie Wang, Xi-cheng Wei, Wenqi Zhu, Jian Wu, N. Wu","doi":"10.1109/IPFA.2013.6599206","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599206","url":null,"abstract":"In recent years, it's a tendency that many researchers are focusing on low Ag lead-free solder due to high cost of silver. However, it's inevitable that the oxidation may arise because of higher content of tin, especially in wave soldering. In this study, the melting point, hardness, microstructure, wettability and anti-oxidation property of Sn-0.3Ag-0.7Cu-0.004P solder (SACP) were researched and compared with those of Sn-0.3Ag-0.7Cu (SAC). SACP had better oxidation resistance and poorer wettability than SAC, and their melting characteristics were similar.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115191125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Ultra high precision circuit diagnosis through seebeck generation and charge monitoring 通过塞贝克产生和电荷监测实现高精度电路诊断
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599119
C. Boit, Clemens Helfmeier, Dmitry Nedospasov, A. Fox
{"title":"Ultra high precision circuit diagnosis through seebeck generation and charge monitoring","authors":"C. Boit, Clemens Helfmeier, Dmitry Nedospasov, A. Fox","doi":"10.1109/IPFA.2013.6599119","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599119","url":null,"abstract":"This work investigates the generator properties of the Seebeck effect and the advantages of current detection via internal charge monitoring over external SMU measurement. Each of the two aspects increases precision in circuit diagnostics. A detailed study of the Seebeck signal enables classification of not only malfunctions, but local characterization of each circuit cell, node or device in terms of operating condition or logical state. Hence, this technique provides a new level of precise circuit diagnosis. Charges are a widely neglected physical quantity in electronic circuit analysis. An ultra-precise measurement of local currents can be derived from monitoring small scale charge collection. This concept increases current sensitivity by several orders of magnitude compared to the most precise SMU results. For example, the faint degradation currents of dielectrics under stress can be detected well below breakdown. A current sensitivity to the 10 aA regime is demonstrated here for the first time in microelectronics.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114953050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Novel approach in selective area chemical etching of copper metallization for electrical failure analysis 铜金属化的选择性区域化学蚀刻用于电气故障分析的新方法
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599146
L. Chuan, Nurhanani Binti Zakaria, M. Stephan
{"title":"Novel approach in selective area chemical etching of copper metallization for electrical failure analysis","authors":"L. Chuan, Nurhanani Binti Zakaria, M. Stephan","doi":"10.1109/IPFA.2013.6599146","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599146","url":null,"abstract":"The paper outlines a chemically developed method for selective area partial metal removal of copper metallization for electrical failure analysis (FA) purposes, such as micro-probing and fault isolation of power integrated circuit(IC) devices. Analysis procedures, evaluation and discussion are presented as reference.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"143 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116002045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The worst stress condition of hot carrier degradation on high voltage LDMOSFET 高压LDMOSFET热载流子退化的最坏应力条件
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599255
Sarah Zhou Huayang, Y. Song, Z. Song, Lisa Yu Yanju, Atman Zhao Yong, Jeff Wu, V. Chang, K. Chien
{"title":"The worst stress condition of hot carrier degradation on high voltage LDMOSFET","authors":"Sarah Zhou Huayang, Y. Song, Z. Song, Lisa Yu Yanju, Atman Zhao Yong, Jeff Wu, V. Chang, K. Chien","doi":"10.1109/IPFA.2013.6599255","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599255","url":null,"abstract":"This paper reports the research of applying the worst stress condition of thick gate oxide LDMOSFET hot carrier reliability. Based on electrical characteristic and hot carrier degradation investigation, the worst stress condition selection and failure mechanism are discussed and then the reasonable stress condition is proposed in this paper.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116336766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel optical structure of numerical aperture increasing lens (NAIL) for resolution improvement in backside failure analysis 一种新型光学结构的数值孔径增大透镜(NAIL)用于提高背面失效分析的分辨率
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599210
Li Tian, Kuibo Lan, Gaojie Wen, Miao Wu, Chunlei Wu, Diwei Fan, Dong Wang
{"title":"A novel optical structure of numerical aperture increasing lens (NAIL) for resolution improvement in backside failure analysis","authors":"Li Tian, Kuibo Lan, Gaojie Wen, Miao Wu, Chunlei Wu, Diwei Fan, Dong Wang","doi":"10.1109/IPFA.2013.6599210","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599210","url":null,"abstract":"As the development of VLSI and scaling down & multi-metal-layer of semiconductor devices, there was the obstacle for failure analysis (FA) from front side of device. So, FA from backside was developed in microelectronics yield in recent years. As is known to all, we could capture clearer infrared (IR) image from backside as Si substrate was thinner. But if we needed higher resolution image with conventional optical objective lens, we must introduced NAIL or shorter wavelength light to improve numerical aperture (NA) in objective space. In this paper, we proposed one novel optical structure of NAIL to enlarge aperture angle in objective space to obtain larger NA value and higher resolution. We introduced the principle of NAIL, designed our optical structure, and analyzed its characteristic. Its advantages were that (1) the variable refractive index of liquid material and liquid made light scattering decreased, (2) common solid body material-glass which made fabrication process simply due to its larger size. So, we believed the novel optical structure was beneficial to our FA from backside.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129910163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Interconnect reliability assurance for circuits with billions of transistors 数十亿晶体管电路互连可靠性保证
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599143
T. Turner
{"title":"Interconnect reliability assurance for circuits with billions of transistors","authors":"T. Turner","doi":"10.1109/IPFA.2013.6599143","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599143","url":null,"abstract":"The small number of atoms involved in a 20nm conductor makes the conductor susceptible to the local variation in stress, grain structure and surrounding dielectric consistency. This leads to a larger variation in the performance of each metal line or via. At the same time, we increase the number of metal lines on a chip. The results is a complex failure distribution that will require design mitigation to accomplish the goals set for the product.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127259207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Impact of cerium oxide's grain size for dielectric relaxation 氧化铈晶粒尺寸对介电弛豫的影响
Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2013-07-15 DOI: 10.1109/IPFA.2013.6599126
Chun Zhao, Cezhou Zhao, M. Werner, S. Taylor, P. Chalker, P. King
{"title":"Impact of cerium oxide's grain size for dielectric relaxation","authors":"Chun Zhao, Cezhou Zhao, M. Werner, S. Taylor, P. Chalker, P. King","doi":"10.1109/IPFA.2013.6599126","DOIUrl":"https://doi.org/10.1109/IPFA.2013.6599126","url":null,"abstract":"Cerium oxide (CeO2) thin films used liquid injection atomic layer deposition (ALD) for deposition and ALD procedures were run at substrate temperatures of 150 °C, 200 °C, 250 °C, 300 °C and 350 °C, respectively. CeO2 were grown on n-Si(100) wafers. Variations in the grain sizes of the samples are governed by the deposition temperature and have been estimated using Scherrer analysis of the X-ray diffraction patterns. Strong frequency dispersion is found in the capacitance-voltage measurement. Normalized dielectric constant is quantitatively utilized to characterize the dielectric constant variation. The relationship extracted between grain size and dielectric relaxation for CeO2 suggests that tuning properties for improved frequency dispersion can be achieved by controlling grain size, hence, the strain at the nanoscale dimensions.","PeriodicalId":301935,"journal":{"name":"Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131093009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信
小红书