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Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)最新文献

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Switching noise due to internal gates: delay implications and modeling 由于内部门的开关噪声:延迟影响和建模
Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474) Pub Date : 1900-01-01 DOI: 10.1109/ICCDCS.2000.869819
G. Casimiro Gomez, A. Cadena, V. Champac
{"title":"Switching noise due to internal gates: delay implications and modeling","authors":"G. Casimiro Gomez, A. Cadena, V. Champac","doi":"10.1109/ICCDCS.2000.869819","DOIUrl":"https://doi.org/10.1109/ICCDCS.2000.869819","url":null,"abstract":"In this paper the ground bounce due to switching of internal CMOS gates is analyzed. The implications of the switching noise on the delay of the switching gates are analyzed. A novel analytical model to estimate the switching noise due to internal logic is proposed. A good agreement has been found between the proposed analytical model with HSpice simulations.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"297 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123273878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K 提出了一种在300 K下提取完全耗尽SOI nMOSFET上LDD掺杂浓度的新方法
Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474) Pub Date : 1900-01-01 DOI: 10.1109/ICCDCS.2000.869841
A. S. Nicolett, J. Martino, E. Simoen, C. Claeys
{"title":"A new method to extract the LDD doping concentration on fully depleted SOI nMOSFET at 300 K","authors":"A. S. Nicolett, J. Martino, E. Simoen, C. Claeys","doi":"10.1109/ICCDCS.2000.869841","DOIUrl":"https://doi.org/10.1109/ICCDCS.2000.869841","url":null,"abstract":"We present a simple method to extract the effective doping concentration related to the LDD (Lightly Doped Drain) regions in fully depleted SOI MOSFETs. The series resistance of an LDD structure MOSFET is composed of different components, the LDD series resistance, being the dominant one. The proposed method uses the back gate voltage influence on the back interface below the LDD region. MEDICI simulations were used to support the analysis.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134354601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The subthreshold-to-linear transition in submicron MOSFETs at high temperature 高温下亚微米mosfet的亚阈值到线性转变
Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474) Pub Date : 1900-01-01 DOI: 10.1109/ICCDCS.2000.869839
E. Gutiérrez-D., R. Murphy-A
{"title":"The subthreshold-to-linear transition in submicron MOSFETs at high temperature","authors":"E. Gutiérrez-D., R. Murphy-A","doi":"10.1109/ICCDCS.2000.869839","DOIUrl":"https://doi.org/10.1109/ICCDCS.2000.869839","url":null,"abstract":"The operation and modelling of submicron MOSFETs in the subthreshold-to-linear transition region is becoming a crucial issue, especially for deep-submicron or nanodevices that need to be operated at a low-voltages to reduce hot-carrier effects and degradation. The impact of high-temperature (200 C) operation in this transition region is discussed in this work.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132398908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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