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Proceedings of International Symposium on Semiconductor Manufacturing最新文献

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Analysis of mixed-signal manufacturability with statistical TCAD 混合信号可制造性的统计TCAD分析
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524406
D. Hanson, R. Goossens, M. Redford, J. McGinty, J. Kibarian, K. Michaels
{"title":"Analysis of mixed-signal manufacturability with statistical TCAD","authors":"D. Hanson, R. Goossens, M. Redford, J. McGinty, J. Kibarian, K. Michaels","doi":"10.1109/ISSM.1995.524406","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524406","url":null,"abstract":"We have developed a method which combines TCAD simulation with statistical analysis of empirical data. As a result, we can determine worst case models before a significant sample size of fabricated devices can be characterized. As measured data is collected we use models built from simulated data to analyze measured in-line and e-test data. We determine what is the minimum set of e-test or in-line measurements to control the SPICE model parameters. As a result we can provide predictive worst case models, update them based on fabrication data as development proceeds, and finally use them to control the manufacturing line.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131698213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Evaluation and control method of organic contamination on wafer surfaces 硅片表面有机污染评价与控制方法
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524383
M. Saito
{"title":"Evaluation and control method of organic contamination on wafer surfaces","authors":"M. Saito","doi":"10.1109/ISSM.1995.524383","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524383","url":null,"abstract":"Organic contamination on wafers can be reduced by at least 50% by storing the wafers in a local space isolated from the clean room atmosphere. However, some components of the local space might cause wafer contamination due to degassing. It is thus necessary to select components with less degassing and to adopt a suitable method for component evaluation. A component evaluation method using the wafer as adsorbent is introduced, which is advantageous in that it detects the contaminants on the wafer only.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131704717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Process equipment particle control with inline inspection 过程设备颗粒控制与在线检查
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524364
K. Mori, N. Nguyen, J. Kantapit
{"title":"Process equipment particle control with inline inspection","authors":"K. Mori, N. Nguyen, J. Kantapit","doi":"10.1109/ISSM.1995.524364","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524364","url":null,"abstract":"Particles from process equipment have serious effects on the yield and profitability of a manufacturing facility. With a more advanced inspection tool, more particles are detected, but it is too costly to try to eliminate them all. It is necessary to identify the sources of the highest yield-killing defects to prioritize the efforts for effective yield improvement. This paper reviews the causes of process equipment particle and discusses the strategies and methodologies to achieve the goal of particle reduction for effective yield improvement.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115013971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Contamination issues in gas delivery to a gate oxide process 气体输送到栅极氧化过程中的污染问题
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524378
S. Krishnan, O. Laparra, A. Tudhope
{"title":"Contamination issues in gas delivery to a gate oxide process","authors":"S. Krishnan, O. Laparra, A. Tudhope","doi":"10.1109/ISSM.1995.524378","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524378","url":null,"abstract":"The contamination contributed by a conventional gas manifold and associated interconnects delivering process gases to a gate oxidation furnace was compared to that contributed by an ultraclean manifold. Additionally, the extent of corrosion by HCl on conventional and ultraclean tubing, welded using conventional and ultraclean welding techniques respectively, was investigated.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"265 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134644843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Affordability concerns in advanced semiconductor manufacturing: the nature of industrial linkage 先进半导体制造业的可负担性问题:产业联动的本质
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524345
D. Hicks, S. Brown
{"title":"Affordability concerns in advanced semiconductor manufacturing: the nature of industrial linkage","authors":"D. Hicks, S. Brown","doi":"10.1109/ISSM.1995.524345","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524345","url":null,"abstract":"Does an affordability problem loom in the semiconductor industry? If so, the frantic pace of technical advance may threaten to become the bane of-rather than a boon to-the continuing development of the semiconductor industry. For this reason, semiconductor manufacturing may not be far from a kind of industrial divide that could set in motion a series of paradigm shifts capable of powerfully restructuring industry fundamentals. This paper presents the results of data developed for a case study pair in order to detect any evidence of such an affordability barrier to technical advance. A sequence of analyses that follows seeks to illustrate how the competitive performances of semiconductor manufacturers can be influenced by the performances of their suppliers as financial exigencies are passed forward and backward.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129405886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Integration of costing, yield and performance metrics into the TCAD environment through the combination of DOE and RSM 通过DOE和RSM的结合，将成本、产量和绩效指标整合到TCAD环境中
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524405
M. Fallon, A. Walton, M. Newsam, V. Axelrad, Y. Granik
{"title":"Integration of costing, yield and performance metrics into the TCAD environment through the combination of DOE and RSM","authors":"M. Fallon, A. Walton, M. Newsam, V. Axelrad, Y. Granik","doi":"10.1109/ISSM.1995.524405","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524405","url":null,"abstract":"This paper details a procedure that uses a Total TCAD framework for producing costing and yield response surfaces in addition to the normal performance related information. It uses CALPHURNIA to integrate the simulation and experimental design software into the same environment. In addition to the transfer of data between the two packages, CALPHURNIA also automates the fitting of response surfaces and the creation of response distribution information for the design of robust processes. CAESAR is used to manage the process, device and circuit simulators while RS/1 performs the experimental design role. The costing and yield information is held as formulas within RS/1 which, when combined with the process details, can produce response surfaces of cost information that can be used to help the process designer select the most appropriate operating region.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122182965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Optimal control processing to increase single wafer reactor throughput in LPCVD 提高LPCVD单晶片反应器吞吐量的最优控制处理
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524398
P. Crouch, Lijuan Song, K. Tsakalis, T. Cale
{"title":"Optimal control processing to increase single wafer reactor throughput in LPCVD","authors":"P. Crouch, Lijuan Song, K. Tsakalis, T. Cale","doi":"10.1109/ISSM.1995.524398","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524398","url":null,"abstract":"In this paper, Optimal Control theory is applied to develop an alternative process protocol in single wafer reactor LPCVD on patterned wafer in an effort to minimize the processing time, for given final step coverage. To achieve this, the operating conditions are changed during the deposition in a prescribed manner. A simplified control model is developed from the simultaneous one-dimensional Knudsen diffusion and chemical reaction description. The optimal control problem is formulated to find a temperature trajectory yielding the minimum processing time and its solution is computed numerically via a modified variation of extremals method. To demonstrate the concept of optimal control CVD (OCCVD), we consider the thermally activated deposition of silicon dioxide (SiO/sub 2/) from tetraethylorthosilicate (TEOS). Using the simplified control model, the estimated process time to achieve a 96% step coverage at 98% closure with the constant rate CVD (CRCVD) strategy is 729 seconds. Under the same conditions, the optimal control CVD (OCCVD) process time is 278 seconds. Compared to CRCVD, the process time saved with OCCVD is 62%.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124121772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new LSI manufacturing scheme in the large-diameter wafer era for super-quick TAT development and volume production 在大直径晶圆时代，为超快速TAT开发和量产提供了一种新的LSI制造方案
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524399
A. Koike, S. Shimoyashiro, K. Kubota, N. Suzuki, Y. Kiguchi, A. Fujisawa, A. Takamatsu, T. Okabe
{"title":"A new LSI manufacturing scheme in the large-diameter wafer era for super-quick TAT development and volume production","authors":"A. Koike, S. Shimoyashiro, K. Kubota, N. Suzuki, Y. Kiguchi, A. Fujisawa, A. Takamatsu, T. Okabe","doi":"10.1109/ISSM.1995.524399","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524399","url":null,"abstract":"We describe a new LSI manufacturing scheme which features the compatibility of quick TAT development and volume production. It is composed of a main production line and extra paths of single-wafer processing. In the super-quick TAT runs, all of the batch process steps in the main line are replaced by single-wafer processing. The process compatibility enables us to smoothly transfer from development to volume production. We discuss implementation issues, and show experimental and simulation results to verify the effectiveness of this concept in the development of logic and memory products. This approach will reduce the cost for process development, and enhance the evolution of single-wafer processing equipment towards the large-diameter wafer era.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127554524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Low cost production by simplified processing 简化加工，降低生产成本
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524407
T. Ohmi
{"title":"Low cost production by simplified processing","authors":"T. Ohmi","doi":"10.1109/ISSM.1995.524407","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524407","url":null,"abstract":"High throughput and low cost production with 100% yield is strictly demanded for ULSI manufacturing, where a decrease of minimum feature size of devices and an increase of wafer diameter is continuously enhanced for the future. It is realized by simplified processing due to a simplified device structure by introducing new concepts of devices and new materials to Si technology. Simplification of manufacturing processes becomes possible based on a full understanding of process mechanisms in a scientific manner, resulting in a dramatic reduction of process steps.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123218819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A hierarchical scheduling system using new weight assigned function in VLSI development lines 在超大规模集成电路(VLSI)开发线上采用新的权重分配功能的分级调度系统
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524365
H. Ishizuka, S. Matsumoto, K. Nakata, S. Tanimura, Y. Hirofuji
{"title":"A hierarchical scheduling system using new weight assigned function in VLSI development lines","authors":"H. Ishizuka, S. Matsumoto, K. Nakata, S. Tanimura, Y. Hirofuji","doi":"10.1109/ISSM.1995.524365","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524365","url":null,"abstract":"Many kinds of scheduling systems have been devised in order to realize an efficient operation of production lines by means of, for example, shortening turn around time (TAT). The VLSI development line requires the following special key items: (1) an efficient lot processing schedule as the number of process steps in given period are maximized; (2) the quick making of a schedule counteracting the alternation of recipes and changes of the period demanded for the experimentation. We developed a new hierarchical scheduling system (DYSCHE II: DYnamic SCHEduling system II) using a Weight Assigned Function (WAF) to overcome the problem of conventional scheduling systems.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115738252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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