{"title":"Yield enhancement vs. performance improvement in VLSI circuits","authors":"V. Chiluvuri, I. Koren","doi":"10.1109/ISSM.1995.524352","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524352","url":null,"abstract":"For advanced submicron VLSI technologies maintaining higher performance and better yield is a challenging task. Layout optimization for improving yield may affect the circuit performance and vice versa. We analyse the effect of layout modifications for parasitic capacitance reduction on yield in this paper. Our results show that the solutions to the yield enhancement and parasitic capacitance reduction problems are very close to each other.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131656170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Manufacturability evaluation of deep submicron exposure tools using statistical metrology","authors":"C. Yu, Hua‐yu Liu, C. Spanos","doi":"10.1109/ISSM.1995.524396","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524396","url":null,"abstract":"Statistical Metrology has been proposed as a technique to extract variability components of an IC process sequence through the combined use of conventional metrology and statistical filtering. We have developed a methodology to decompose and categorize CD variability into individual equipment contributions, specifically the steppers and reticles used in 0.35 /spl mu/m polysilicon gate patterning. Spatial variability was sampled using a reticle designed to collect CD measurements over the exposure field and the wafer. Then, a series of statistical and physical filters were implemented to separate the reticle and stepper contributions to CD variability. Results have shown that CD variability has strong spatial and causal components. Decomposition results are applied towards: (1) Identifying bottlenecks in manufacturability by providing an accurate error budget analysis. (2) Using isolated equipment variability components as a manufacturability metric to benchmark exposure tools. (3) Quantifying the correlation between spatial variability components can be manipulated to improve net process manufacturability.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133938067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Bonal, A. Sanchez, S. Aparicio, M. Fernandez, J. González, L. Rios, M. Rosendo, S. Malvar
{"title":"Productivity improvement driven by an integrated manufacturing system","authors":"J. Bonal, A. Sanchez, S. Aparicio, M. Fernandez, J. González, L. Rios, M. Rosendo, S. Malvar","doi":"10.1109/ISSM.1995.524347","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524347","url":null,"abstract":"An integrated manufacturing system is under development in the AT&T Madrid plant. It has three basic modules: planning, execution, and measurement/analysis and corrective actions. The planning module uses engineering standards to calculate the resources needed for any business requirement. At the same time it calculates the utilization required and the cycle time goals for all the work centers, allowing an optimization of the trade-off utilization (cost)/cycle time. The same engineering standards and planning factors (number of machines, etc.) feed the execution module. The core of this module is a scheduler which manages the product flow, assigning the work per shift and facility type. The production rates are calculated taking into consideration commitments to the customers, current machine status, inventory availability, engineering standards and the inventory managing rules obtained by the experience or simulation. The third module compares current cycle times per work center with the values assigned by the cycle time model. The major discrepancies are traced back to engineering standards not achieved. When a capacity increase is planned, future problems can be forecasted by the comparison between the percent utilization of available time obtained in the capacity model with the standards and with the current values of the same parameters. All the major issues trigger corrective action plans. These are tracked until they disappear. The first 21 weeks of use of the Integrated Manufacturing system has driven a cycle time improvement of 20% (see chart II) and, at the same time, the wafers started were increased by 18%.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134252987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Global planning at Harris Semiconductor","authors":"S. V. Murty, J. Bienvenu","doi":"10.1109/ISSM.1995.524350","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524350","url":null,"abstract":"Harris Semiconductor needed an integrated system to manage its entire supply-chain, especially after tripling its manufacturing capacity to enter the commercial markets. The response was to implement the manufacturing planning system known as IMPReSS, Integrated Manufacturing Production Requirements Scheduling System. It is one of the reasons that Harris has been a consistent world-class 95% or better on time delivery company since 1993 with over 30,000 Finished Goods, a fact that was not lost on the Edelman Committee. IMPReSS won the prestigious management science 1995 Franz Edelman Award for its contribution. IMPReSS is a global information network of distributed databases which includes an optimization-based, semiconductor-specific planning engine that scans the entire pipeline. This paper includes the reasons for choosing a Linear Programming based planning engine from the University of California, Berkeley, known as BPS, over the traditional MRP systems; improvements made to BPS resulting in a new planning engine known as the Harris Planning System, HPS; and the lessons learned by Harris.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116479385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Next generation processes and equipment that lead to positive environment, safety and health impacts","authors":"P. Pei, H. R. Kerby","doi":"10.1109/ISSM.1995.524388","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524388","url":null,"abstract":"The technology development needed to support continuous improvement in ESH characteristics of semiconductor manufacturing facilities is changing as strategies for source reduction, incident prevention and more refined schemes for assessing ESH improvement emerge. This paper briefly characterizes the changes taking place in ESH management structure and focuses on examples of technology development underway to satisfy the new model of ESH execution reflected in this structure change.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115196308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Kawasima, S. Bannai, T. Chiba, I. Honbori, T. Kisakibaru
{"title":"In-situ plasma cleaning by rotating transverse magnetic field","authors":"T. Kawasima, S. Bannai, T. Chiba, I. Honbori, T. Kisakibaru","doi":"10.1109/ISSM.1995.524353","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524353","url":null,"abstract":"In the new type of method, the rotating transverse magnetic field is added to the plasma by magnetic coils set around the chamber. Ions and radicals are forcibly pulled out from the plasma up to the inner surface of the chamber by the above magnetic field. In this method, the amount and the energy of ions and radicals can be controlled by the magnetic field intensity so as to be effective in removing the residual product. The etching rate on the inner surface gradually increases in proportion to the magnetic field intensity and becomes larger than that on the electrode at 600 Gauss.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129277656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A methodology for the top-down synthesis of semiconductor process flows","authors":"S. Saxena, P. K. Mozumder, A. Unruh, R. Burch","doi":"10.1109/ISSM.1995.524354","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524354","url":null,"abstract":"Increasing expense of developing microelectronic manufacturing technology threatens to slow the growth of the electronics industry. This paper describes the progress we have made in developing methodologies and techniques to reduce the cost of designing microelectronic manufacturing flows. Our approach is to partition the task of process flow design into a number of abstraction levels and provide mechanisms to translate between these levels. This approach results in a top-down design methodology where requirements from higher levels of abstraction are successively reduced to lower abstraction levels, while meeting the constraints imposed by the lower levels. The paper enumerates the abstraction levels we have identified so far, and describes the translation mechanisms for a class of process design tasks: modification of an existing flow in response to change in performance requirements. Finally, we briefly describe a design environment that incorporates these ideas.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131312746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. J. Swindeman, R. D. Seals, W. Murray, M. H. Cooper, K. Forbes
{"title":"An investigation of thermally-sprayed aluminum oxide coatings for high-temperature electrostatic chucks (ESCs)","authors":"C. J. Swindeman, R. D. Seals, W. Murray, M. H. Cooper, K. Forbes","doi":"10.1109/ISSM.1995.524397","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524397","url":null,"abstract":"Thermally-sprayed aluminum oxide (Al/sub 2/O/sub 3/) coatings were investigated as candidate materials for high temperature electrostatic chucks (ESCs). Electrical resistivities and dielectric constants of Al/sub 2/O/sub 3/ coatings deposited on test coupons were measured at temperatures up to 500/spl deg/C. Limited breakdown voltage testing was also performed. To examine the effect of impurities on electrical resistivity over the test temperature range, data for plasma-sprayed alumina coatings of various purity levels were compared. Resistivity data for plasma- and high velocity oxy-fuel (HVOF)-sprayed coatings were compared to data reported for sintered alumina of various purity levels, with the coatings generally exhibiting higher resistivities than bulk alumina for similar purity levels. The effect of plasma-spray power level and feed angle on electrical resistivity of coatings deposited using two types of high purity alumina was also examined. Results of these tests were used to select a coating and spray process to fabricate a pair of small-scale ESCs. When evaluated in a test chamber, these ESCs showed promising behavior by maintaining adequate wafer holding pressures after testing up to 24 hours at a maximum test temperature of 400/spl deg/C. Results of test coupon and small-scale ESC testing suggest that it may be possible to produce an effective alumina coating for high temperature ESCs through proper control of coating impurities and thermal spray process characteristics, although further work is needed to more fully characterize coatings and optimize process conditions.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"116 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122961973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Recognition and rewards: human elements of semiconductor manufacturing excellence","authors":"P. Mack, M. Simmons, S. Thornton","doi":"10.1109/ISSM.1995.524379","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524379","url":null,"abstract":"As semiconductor manufacturing companies, including Advanced Micro Devices, continue on the Journey To Manufacturing Excellence, those that address technological issues and human issues will help ensure long-term corporate success. Organizations which recognize and reward the people who, on a daily basis, perform their jobs in a manner which helps their companies maintain and improve their competitive position within the semiconductor industry will have embraced one of the most important elements of manufacturing excellence-the human element-and will in turn realize significant return on their investment. Of specific interest in the area of recognition and rewards is peer recognition-an innovative approach to rewarding individuals which is work-team driven.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117349103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Progressive automation system for semiconductor manufacturing","authors":"Y. Iwata, S. Shimoyashiro, T. Masui","doi":"10.1109/ISSM.1995.524374","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524374","url":null,"abstract":"A new semiconductor manufacturing line was set up and subsequently expanded to meet growing demand. The high yields and short turn-around time necessitated by the most recent technology requires current process equipment to operate at the limit of its capacity. Current factory automation systems must continually evolve to meet these new requirements. The semiconductor manufacturing line consists of several bays, such as those for photolithography and ion implantation. Hitachi has developed a progressive, flexible automation system that can be applied to manufacturing at the bay level. This system has two aims: to reduce operators' working hours by fully automating fabrication and semi-automating the inspection of wafers and equipment, and to increase working intervals between required equipment maintenance. The automation system is realized using in-situ monitoring.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122215503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}