V. Goudar, Zhi Ren, P. Brochu, Q. Pei, M. Potkonjak
{"title":"Optimizing the configuration and control of a novel human-powered energy harvesting system","authors":"V. Goudar, Zhi Ren, P. Brochu, Q. Pei, M. Potkonjak","doi":"10.1109/PATMOS.2013.6662158","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662158","url":null,"abstract":"As sensor equipped wearable systems enter the mainstream, system longevity and power-efficiency issues hamper large scale and long-term deployment, despite substantial foreseeable benefits. As power and energy efficient design, sampling, processing and communication techniques emerge to counter these issues, researchers are beginning to look on wearable energy harvesting systems as an effective counterpart solution. In this paper, we propose a novel harvesting technology to inconspicuously transduce mechanical energy from human foot-strikes and power low-power wearable systems in a self-sustaining manner. Dielectric Elastomers (DEs) are high-energy density electrostatic transducers that can transduce significant levels of energy from a user while appearing near-transparent to her, if configured and controlled properly. Towards this end, we propose DE-based harvester configuration that capitalizes on properties of human gait to enhance transduction efficiency, and further leverage these properties in an adaptive control algorithm to optimize the net energy produced by the system. We evaluate system performance from detailed analytical and empirical models of DE transduction behavior, and apply our control algorithm to the modeled DEs under experimentally collected foot pressure datasets from multiple subjects. Our evaluations show that the proposed system can achieve up to 120mJ per foot-strike, enough to power a variety of low-power wearable devices and systems.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133379726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power consumption analysis using multi-view modeling","authors":"Carlos Gomez, Julien Deantoni, F. Mallet","doi":"10.1109/PATMOS.2013.6662180","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662180","url":null,"abstract":"Non-functional properties take an important place in real-time systems. Power consumption, time performance and temperature are non-functional properties that are individually analyzed using specialized tools. Nevertheless, non-functional properties are interrelated, and changes on one property may affect the other ones, but also may impact the system function itself. In this work, we propose a multi-view system model to combine different property domains without depending on the proprietary formats defined by specialized tools. We start by the definition of a multi-view model and explain how the different views are connected. Then we focus on the analysis of our multiview model by picking out a tool dedicated to power analysis, Aceplorer. This multi-view system model is implemented in a uml profile, where the marte and SysML concepts are used in the profile definition.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127785719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On-line thermal emulation: How to speed-up your thermal controller design","authors":"Francesco Beneventi, Andrea Bartolini, L. Benini","doi":"10.1109/PATMOS.2013.6662161","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662161","url":null,"abstract":"Dynamic thermal management (DTM) is a key technology for future many-core systems. Indeed systems, as both server-class and embedded chip multiprocessors are thermally constrained. DTM design requires consideration for the chain of interactions between HW operating points, workload phases, power consumption, die temperature, HW monitor infrastructure, control policy. Hugely different time scales are involved, from microseconds to hours. Simulating performance of DTM solutions for a many-core system in a reasonable time is an open problem. In this paper we present an on-line thermal emulation framework based on the Intel Single-Chip-Cloud computer. In our framework a subset of the cores are used to on-line emulate the evolution of a generic thermal floorplan based on the real workload usage and operating point selected by the rest of the cores which emulate the target managed system. This enables design space exploration of dynamic thermal management solutions at the speed of real workload execution.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116901605","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SET propagation in micropipelines","authors":"T. Polzer, A. Steininger","doi":"10.1109/PATMOS.2013.6662165","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662165","url":null,"abstract":"Radiation-induced Single Event Transients (SETs) have the potential to create metastability in asynchronous circuits, as they are much shorter than the typical handshake cycle and do not respect the timing closure. Micropipelines have been shown to be effective in filtering those pulses. In this paper1 we investigate the propagation of pulses of critical width through a micropipeline in SPICE simulations. We study how the pipeline implementation, especially the output buffer design (matched threshold, high threshold, Schmitt-trigger) influences the propagation behavior. For the solutions with single sided thresholds we observe a considerable propagation potential of critical pulses that strongly depends, however, on the degree of threshold matching. The Schmitt trigger output, in contrast, reliably filters all pulses which are shorter than a certain threshold while propagating all others securely. At the same time our respective analysis reveals that the cost of the Schmitt trigger stage in terms of performance overheads is also significant, so the choice needs to be carefully balanced with the application requirements.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122016088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Magnani, V. d’Alessandro, N. Rinaldi, M. Magistris, K. Aufinger
{"title":"Dynamic electrothermal macromodeling techniques for thermal-aware design of circuits and systems","authors":"A. Magnani, V. d’Alessandro, N. Rinaldi, M. Magistris, K. Aufinger","doi":"10.1109/PATMOS.2013.6662178","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662178","url":null,"abstract":"The applicability of classical macromodeling techniques to dynamic electrothermal analysis is reviewed, with emphasis on specific aspects of the Fourier heat conduction problem. Modeling based on the characterization of thermal multiports is considered, and the identification of corresponding thermal impedances in frequency and time domain is discussed, along with the synthesis of electrical equivalents well suited for standard circuit simulators like SPICE. The presented approach is illustrated through relevant case-studies, namely, two basic analog electronics circuits in state-of-the-art bipolar technologies.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"106 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120865980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An assessment of software lifecycle energy","authors":"V. Moshnyaga","doi":"10.1109/PATMOS.2013.6662163","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662163","url":null,"abstract":"Software energy assessment is important for reducing environmental impact of modern information technologies (IT). While software does not consume energy, for any computing hardware the energy cost of processing strongly depends on control defined by software. This paper analyzes the total energy consumption associated with software production, delivery and use and assesses their contribution to green-house gas emissions. The results reveal that the energy consumed at the production stage dominates the total lifecycle energy as software size grows. However, if software is largely used, most of the lifecycle energy is consumed at the use stage. For software as big as Linux 3.2 kernel, the total lifecycle energy exceeds 51 Giga Watt-hours i.e. equivalent of 31kilotons of CO2 emission. Reducing this environmental impact requires energy-conscious software development and management. This paper is not intended as a comprehensive analysis rather as a starting point for research toward green software development.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116807570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability monitoring of digital circuits by in situ timing measurement","authors":"N. P. Aryan, G. Georgakos, D. Schmitt-Landsiedel","doi":"10.1109/PATMOS.2013.6662168","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662168","url":null,"abstract":"Recent technological advances in semiconductor industry have led to extreme scaling of CMOS devices. In such advanced technologies fulfilling application specific reliability requirements is not an easy task. This is a crucial issue particularly in case of safety-critical applications with strict reliability requirements. In this paper we propose accurate monitoring of reliability status of digital circuits through measuring the remaining timing slack of the system. Moreover, we propose and evaluate the optimized design and implementation of the required aging resistant circuitry in a low power 65nm technology. Besides the quantitative evaluations regarding the accuracy and robustness of the monitoring circuitry, we evaluate the power efficiency of the monitoring approach for a test circuit. Our studies support the applicability of the proposed monitoring methodology to fulfill application specific reliability requirements.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115715796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Enabling energy-aware design decisions for behavioural descriptions containing black-box IP-components","authors":"Lars Kosmann, Daniel Lorenz, A. Reimer, W. Nebel","doi":"10.1109/PATMOS.2013.6662155","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662155","url":null,"abstract":"The abstraction level of designing digital circuits is rising since high-level synthesis tools are gaining acceptance and are available from different vendors. Simultaneously, the demand for accurate energy estimations on higher abstraction levels is increasing. But estimating energy on these abstraction levels is a difficult task since switching capacitances and area depend on scheduling and allocation decisions which are made during high-level synthesis. In this paper a current energy estimation methodology is extended by a power estimation approach to enable energy-aware design designs on behavioural level. The energy estimation uses control-flow information to model energy and runtime of a component while the power estimation approach generates power and protocol state machines by monitoring external port behaviour and putting it in relation to power dissipation. The methodology is evaluated for a linear predictive coding algorithm receiving its input data from a memory block which is provided as a black-box IP-component. By using the presented estimation methodology, it can be decided at behavioural level whether the usage of this memory element violates a given power budget. The average estimation error for energy is 12.55% while runtime can be estimated with an error of 1.5%.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130501939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient eye-diagram determination technique for multi-coupled interconnect lines","authors":"Jung-Hyun Lee, Y. Eo","doi":"10.1109/PATMOS.2013.6662172","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662172","url":null,"abstract":"A new, accurate, and efficient eye-diagram determination technique for multi-coupled interconnect lines is proposed. All the switching-dependent step responses are analytically determined, followed by eye-height, jitter, and worst-case eye-diagram for inter-symbol-interference (ISI). In addition, the proposed technique generates the worst-case input patterns of the worst-case eye-diagram. The accuracy and efficiency of the proposed technique is verified with a test circuit using 3-coupled lines.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129013569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Thomas Ducroux, Germain Haugou, Vincent Risson, P. Vivet
{"title":"Fast and accurate power annotated simulation: Application to a many-core architecture","authors":"Thomas Ducroux, Germain Haugou, Vincent Risson, P. Vivet","doi":"10.1109/PATMOS.2013.6662173","DOIUrl":"https://doi.org/10.1109/PATMOS.2013.6662173","url":null,"abstract":"Power consumption is crucial in embedded systems, mainly because of the limited battery capacity and the problem of heat dissipation. The energy efficiency of System-on-Chips (SoCs) is optimized at both hardware and software level using simulation platforms. The challenge of these platforms lies in the tradeoff between accuracy and simulation speed for early architecture exploration and HW/SW validation. In the context of many-core systems in which heavy software stacks are executed, fast simulation platforms are required. In this paper, we present our power modeling approach of a complex many-core system to estimate the power consumption of software applications executed on it. We propose in particular a light and accurate power model for VLIW processors, as this kind of processor is commonly used in such systems. The power estimator we set up is part of a practical power characterization framework fully automated that includes low level simulations which are then used to back-annotate fast simulation models. Our case study is the STHORM accelerator, a clustered many-core architecture comprising dual-instruction issue processors, a complex memory hierarchy and DMA engines. Experimental results show that we can perform fast power estimations with an estimation error lower than 4% for the VLIW cores, which are the main source of power consumption, and less than 10% for the overall SoC platform, and for a simulation time overhead lower than 1%.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123800248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}