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2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)最新文献

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A 45.4x∼221.2x latency Improvement of SRP-5 Cryptographic Engine for Smart Grid Network 用于智能电网的SRP-5密码引擎延迟提高45.4 ~ 221.2倍
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634833
Yanying Hou, Shaopeng Lai, Hung-Kun Chang, Yun-Wen Lu, Hsie-Chia Chang
{"title":"A 45.4x∼221.2x latency Improvement of SRP-5 Cryptographic Engine for Smart Grid Network","authors":"Yanying Hou, Shaopeng Lai, Hung-Kun Chang, Yun-Wen Lu, Hsie-Chia Chang","doi":"10.1109/A-SSCC53895.2021.9634833","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634833","url":null,"abstract":"In a smart grid network, smart meters transmit user’s real-time data to the power management center, while the users receive time-based pricing information from the power management center. As shown in Fig. 1, a secure two-way communication is needed to be implemented for mutual authentication with key management between the power management center and smart meters. Since the prior work [1] adopting SRP-3 as the authentication steps of the smart grid network will be limited in RSA execution for resource constraint devices, a new SRP-5 [2] cryptographic engine featured in supporting Elliptic Curve Cryptography (ECC), and hardware/software co-design is presented in this paper.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131615927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 1.3-Mbit Annealing System Composed of Fully-Synchronized 9-board x 9-chip x 16-kbit Annealing Processor Chips for Large-Scale Combinatorial Optimization Problems 面向大规模组合优化问题的全同步9板x 9片x 16kbit退火处理器1.3 mbit退火系统
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634769
Kasho Yamamoto, Takashi Takemoto, C. Yoshimura, Mayumi Mashimo, M. Yamaoka
{"title":"A 1.3-Mbit Annealing System Composed of Fully-Synchronized 9-board x 9-chip x 16-kbit Annealing Processor Chips for Large-Scale Combinatorial Optimization Problems","authors":"Kasho Yamamoto, Takashi Takemoto, C. Yoshimura, Mayumi Mashimo, M. Yamaoka","doi":"10.1109/A-SSCC53895.2021.9634769","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634769","url":null,"abstract":"Combinatorial optimization problems, which are categorized into NP-hard problems, are emerging in ever-growing social systems, such as logistics, traffic, and so on. A new computer architecture, called an annealing processor (AP) [1–4], has advanced to solve such difficult problems efficiently as an accelerator in the computing systems. A specific type of AP discovers the ground state (optimal combination of variables, spins) of an Ising model in a short time by highly parallelizing the spin state update process based on simulated annealing (SA) [2–4]. We have built boards with nine AP chips connected to each other [5]. To lunch the annealing systems for real usage, it is necessary to provide a larger-scale annealing system. We built a multiple-board annealing system (AS) with a simple multi-board control beyond the multi-chip AS for the increasing amount of data in the real-world optimization problems. In order to realize such system, it is necessary to adopt a method in which the host board connected to the PC controls the other slave boards, rather than controlling each board individually. Our CMOS-AS consists of three technologies: (i) a routing table to control communication between boards, (ii) a technology to synchronize the annealing process on each chip, and (iii) a compression technology for efficient propagation of spin information in inter-board communication where data transmission amount is limited. The CMOS-AS demonstrated noise reduction as an example of combinatorial optimization problems and multi-board operation of the 9x9x16k spin system with an annealing speed at least three orders of magnitude faster and higher accuracy than running the SG3 and SA on a CPU, conventional technologies to solve optimization problems.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127830410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 1280 x 720 Micro-LED Display Driver with 10-Bit Current-Mode Pulse Width Modulation 一个1280 x 720微型led显示驱动器与10位电流模式脉宽调制
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634720
Pei-Yi Lai Lee, Ya-Wen Yang, Sih-Han Li, Jian-Jhih Sun, T. Y. Hung, Chih-Wen Lu, Yen-Hsiang Fang, W. Kuo, Li-Chun Huang, G. Su, Poki Chen
{"title":"A 1280 x 720 Micro-LED Display Driver with 10-Bit Current-Mode Pulse Width Modulation","authors":"Pei-Yi Lai Lee, Ya-Wen Yang, Sih-Han Li, Jian-Jhih Sun, T. Y. Hung, Chih-Wen Lu, Yen-Hsiang Fang, W. Kuo, Li-Chun Huang, G. Su, Poki Chen","doi":"10.1109/A-SSCC53895.2021.9634720","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634720","url":null,"abstract":"Micro-light-emitting diode (micro-LED) displays are the most promising next-generation displays that use tiny LEDs acting as pixels [1–2]. Micro-LED displays are considerably brighter than are organic LED displays, which makes micro-LED displays suitable for head-up display (HUD), virtual-reality (VR), and augmented-reality (AR) applications [3]. A mass transfer technology is used to transfer a micro-LED array from epitaxy to a Si substrate. Pulse width modulation (PWM) is generally employed to generate gray levels in these arrays [4]. Micro-LED display drivers with voltage-mode PWM have strong driving ability but poor display uniformity. By contrast, current-mode PWM is a suitable driving method for achieving display uniformity. However, for high-resolution micro-LED displays, a large number of pixels must be connected to the data line, which creates a large capacitive load on the data line. A micro-LED consumes only tens of microamperes of current; thus, designing a display driver that uses a small current to drive a high-resolution and high-frame-rate display with current-mode PWM is challenging. In this paper, a precharge scheme and a pixel circuit with two transistors and one LED (2T1D) are proposed to solve the aforementioned issue. A $1280 times 720$ micro-LED display driver with 10-bit current-mode PWM was designed and fabricated in this study. Furthermore, a micro-LED array was successfully integrated into the designed display driver chip, which verified the feasibility of the designed display driver.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133310927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling FlashMAC:具有可变延迟感知调度的节能模拟-数字混合MAC
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634746
Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, H. Yoo
{"title":"FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling","authors":"Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, H. Yoo","doi":"10.1109/A-SSCC53895.2021.9634746","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634746","url":null,"abstract":"The demand for energy-efficient DNN accelerator on edge devices is rapidly increasing. Diverse approaches using analog circuits to overcome the limitations of digital logics – leakage and limited power scaling $(sim mathrm{CV}_{DD}^{2})$ - have been developed. Previous works on analog MACs can be categorized according to their operation domains. The voltage domain MAC have been studied first in the field of matrix multiplier for CNN application [1]. However, it suffered from PVT variation and limited VDD scaling of analog circuits. The frequency-domain MAC [2] took advantage of low supply voltage and high throughput, but a large power consumption of the internal oscillator and its nonlinearity restrict its accuracy of computing. A delay-based MAC approach in the time-domain [3] –[5] recently drew attention because of its easy integration with digital circuits, low power consumption, and small area. However, their support for higher precision is limited and needs multiple delay lines with digital adders for precision scaling.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133117630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Output Capacitor-less Low-dropout Regulator using a Wide-range Single-stage Gain-boosted Error Amplifier and a Frequency-dependent Buffer with a Total Compensation Capacitance of 2.5 pF in 0.5 µm CMOS 采用宽范围单级增益增强误差放大器和频率相关缓冲器的无输出电容低差稳压器，总补偿电容为2.5 pF，采用0.5µm CMOS
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634819
Hyeon-Ji Choi, Joo-Mi Cho, Hyokil Park, Sung-Wan Hong
{"title":"An Output Capacitor-less Low-dropout Regulator using a Wide-range Single-stage Gain-boosted Error Amplifier and a Frequency-dependent Buffer with a Total Compensation Capacitance of 2.5 pF in 0.5 µm CMOS","authors":"Hyeon-Ji Choi, Joo-Mi Cho, Hyokil Park, Sung-Wan Hong","doi":"10.1109/A-SSCC53895.2021.9634819","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634819","url":null,"abstract":"In portable mobile devices, the capacitor-less low-dropout regulator (LDO) is in great demand as a power management unit to achieve complete on-chip design [1] –[6]. In the capacitor-less LDO, it is important to achieve two things: good load/line regulations and a fast transient response.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"122 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114096882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 28.8mW Accelerator IC for Dark Channel Prior Based Blind Image Deblurring 基于暗通道先验的图像去模糊28.8mW加速芯片
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634738
Po-Shao Chen, Yen-Lung Chen, Yu-Chi Lee, Zih-Sing Fu, Chia-Hsiang Yang
{"title":"A 28.8mW Accelerator IC for Dark Channel Prior Based Blind Image Deblurring","authors":"Po-Shao Chen, Yen-Lung Chen, Yu-Chi Lee, Zih-Sing Fu, Chia-Hsiang Yang","doi":"10.1109/A-SSCC53895.2021.9634738","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634738","url":null,"abstract":"Image deblurring can be applied to mitigate the effect introduced by relative movement between object and camera, as shown in Fig. 1(a). Blind deblurring restores sharp images without knowing the camera motion, but it is also very time consuming. For example, it takes 11.4 minutes to process a full-HD image for [1]. Since the blur kernel estimation occupies 99% of blind deblurring process, a dedicated accelerator that utilizes the prior knowledge of gradients for real-time deblurring on mobile devices is presented in [2], which reduces the processing time from 11.4 minutes to 1.7 seconds.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117254644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 7m-range, 4.3mW/Ch. Ultrasound ASIC with Universal Energy Recycling TX for All-Weather Metamorphic Robotic 3D Vision System 7米射程，4.3mW/Ch。具有通用能量回收TX的超声波专用集成电路用于全天候变形机器人三维视觉系统
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634764
Han Wu, Miaolin Zhang, Jiaqi Guo, Zhichun Shao, K. Ng, Jiamin Li, Lian Zhang, Yilong Dong, Liuhao Wu, C. Tsai, Ho Yin Benjamin Lee, Liwei Lin, Jerald Yoo
{"title":"A 7m-range, 4.3mW/Ch. Ultrasound ASIC with Universal Energy Recycling TX for All-Weather Metamorphic Robotic 3D Vision System","authors":"Han Wu, Miaolin Zhang, Jiaqi Guo, Zhichun Shao, K. Ng, Jiamin Li, Lian Zhang, Yilong Dong, Liuhao Wu, C. Tsai, Ho Yin Benjamin Lee, Liwei Lin, Jerald Yoo","doi":"10.1109/A-SSCC53895.2021.9634764","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634764","url":null,"abstract":"A 64-Ch. ultrasound ASIC in 180nm 1P6M standard CMOS is presented for metamorphic robotic machine 3D vision, with 7mrange object detection capability, low-power (4.3mW/Ch.), small form-factor $(5times 5times 5cm^{3})$, and lightweight (100g). The proposed Universal Energy Recycling TX (UERTX) driver circuit saves energy by 81% compared to the conventional class-D driver.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124731319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A-SSCC 2021 TOC
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/a-sscc53895.2021.9634778
{"title":"A-SSCC 2021 TOC","authors":"","doi":"10.1109/a-sscc53895.2021.9634778","DOIUrl":"https://doi.org/10.1109/a-sscc53895.2021.9634778","url":null,"abstract":"","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123418956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 5.7GHz RF Wireless Power Transfer Receiver Using 84.5% Efficiency 12V SIDO Buck-Boost DC-DC Converter with Internal Power Supply Mode 基于84.5%效率12V SIDO Buck-Boost DC-DC转换器的5.7GHz射频无线功率传输接收器
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634794
Tomohiro Higuchi, D. Suzuki, R. Ishida, Y. Isshiki, Kazuki Arai, Kohei Onizuka, K. Miyaji
{"title":"A 5.7GHz RF Wireless Power Transfer Receiver Using 84.5% Efficiency 12V SIDO Buck-Boost DC-DC Converter with Internal Power Supply Mode","authors":"Tomohiro Higuchi, D. Suzuki, R. Ishida, Y. Isshiki, Kazuki Arai, Kohei Onizuka, K. Miyaji","doi":"10.1109/A-SSCC53895.2021.9634794","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634794","url":null,"abstract":"Power supply to the sensors in an IoT-era is a major concern because the number of sensors are so enormous that environmental loads and costs will be huge if wires are used. Also, battery exchange is unacceptable in many cases. RF wireless power transfer (WPT) system is a good solution for the remote power sources with a distance longer than a few meters. Figure 1 shows the 5.7GHz RFWPT system and its specification considered in this work. The TX power is controlled by beamforming using 5.7GHz frequency to reduce beam width and antenna size. The TX-RX distance ranges from 1 to 10m, thus RX RF input power PIN varies from -3 to nearly up to 30dBm $(500 mu W sim 1W)$. The maximum PIN is much higher than that of the typical RF energy harvesting systems can handle [1–4]. To supply multiple RX sensor nodes with a single TX module, time-division power supply is used. For such WPT system, input voltage of the DC-DC converter $(V_{IN_DC})$ needs to cover up to 10V, since the open circuit voltage VOC of the rectifier exceeds 10V at $P_{IN}=30$ dBm. On the other hand, power consumption of the controller circuit should be small to be efficient at low PIN. Furthermore, the DC-DC converter should be kept alive when there is no RF input. This interruption may last a few ms to a few seconds.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122056860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training 基于选择性混合精度再训练的高效深度强化学习FPGA加速器
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI: 10.1109/A-SSCC53895.2021.9634810
Wooyoung Jo, Juhyoung Lee, Seunghyun Park, H. Yoo
{"title":"An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training","authors":"Wooyoung Jo, Juhyoung Lee, Seunghyun Park, H. Yoo","doi":"10.1109/A-SSCC53895.2021.9634810","DOIUrl":"https://doi.org/10.1109/A-SSCC53895.2021.9634810","url":null,"abstract":"Recently, deep reinforcement learning (DRL) has shown human-level performances in sequential decision-making problems including a gaming agent and robot control [1]. Especially, DRL supports autonomous adaptation of edge devices to unknown environments thanks to its distinct characteristics. Fig. 1 shows the basic components of the DRL system. It consists of a DRL agent, a replay buffer, and the environment. Unlike traditional deep learning which requires labeled data, DRL training utilizes experiences stored in the replay buffer. The stored experiences are generated by repetitive interaction between the DRL agent and the environment. This trial-and-error-based training method enables the agent to adapt to sudden environmental changes.","PeriodicalId":286139,"journal":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122656212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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