52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)最新文献_第8页

Deterioration mechanism of flip chip attachment using an anisotropic conductive film and design technology for high reliability 采用各向异性导电膜的倒装片附件劣化机理及高可靠性设计技术

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008244

S. Fujiwara, M. Harada, Y. Fujita, T. Hachiya, M. Muramatsu

引用次数: 9

An energy-based method to predict delamination in electronic packaging 基于能量的电子封装分层预测方法

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008197

H. Fan, P. Chung, M. Yuen, P. Chan

{"title":"An energy-based method to predict delamination in electronic packaging","authors":"H. Fan, P. Chung, M. Yuen, P. Chan","doi":"10.1109/ECTC.2002.1008197","DOIUrl":"https://doi.org/10.1109/ECTC.2002.1008197","url":null,"abstract":"The propensity and significance of interfacial delamination as a crucial failure mechanism in electronic packaging have been well documented in many papers. Many of the failure criteria were used to solve 2-dimensional problem with a pre-crack. However, in real electronic packages, the size and location of the cracks or/and delamination cannot be predicted. It is not easy to use the traditional fracture criteria to deal with more complicated 3-D delamination problems. The potential delamination interface of copper leadframe/Epoxy Molding Compound (EMC) was selected in the study. The stresses of the interface were evaluated by the Button Shear Test. A series of Button Shear Tests was conducted to evaluate the adhesion properties of Epoxy Molding Compounds (EMCs) on copper substrate. In each of the tests, the critical load acting on the EMC of the button shear sample was measured at different shear angles and a finite element model was used to evaluate the stresses at the interface between the mold compound and the copper substrate. In this paper, an energy-based method is proposed by deriving the energy to initiate each of the tensile and shear modes of failure across the interfaces of the button shear test samples for the chosen EMC/leadframe material system. Component stresses were extracted from the numerical simulation in order to compute the distortional strain energy density, (U/sub d/), and the hydrostatic strain energy density, (U/sub h/), relating respectively to the shear and tensile mode. (U/sub d/) and (U/sub h/) were calculated from the Young's modulus of EMC and the average stresses within a selected region of the finite element model where it exhibits high stress values.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131955152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Results of comparative reliability tests on lead-free solder alloys 无铅焊料合金可靠性比较试验结果

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008264

G. Grossmann, G. Nicoletti, U. Soler

引用次数: 23

Development of a time-domain simulation methodology for the hybrid phase-pole interconnect macromodel 混合相极互连宏观模型的时域仿真方法的发展

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008236

B. Zhong, S. Dvorak, J. Prince

引用次数: 3

New effective dielectric constant model for ultra-high speed microstrip lines on multilayer dielectric substrates: effect of conductor-dielectric interphase 多层介质基片上超高速微带线的有效介电常数新模型:导体-介电相效应

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008077

H. T. Vo, C. Davidson, F. Shi

引用次数: 9

Frequency domain behavior of solid and gridded reference power/ground planes in LTCC modules LTCC模块中固体和栅格参考电源/地平面的频域特性

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008072

A. Jancura, Guang Chen

引用次数: 2

Generic, Direct-Chip-Attach MEMS packaging design with high density and aspect ratio Through-Wafer Electrical Interconnect 通用的，直接芯片贴装MEMS封装设计，具有高密度和纵横比通过晶圆电互连

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008099

Seong Joon Ok, J. Neysmith, D. Baldwin

{"title":"Generic, Direct-Chip-Attach MEMS packaging design with high density and aspect ratio Through-Wafer Electrical Interconnect","authors":"Seong Joon Ok, J. Neysmith, D. Baldwin","doi":"10.1109/ECTC.2002.1008099","DOIUrl":"https://doi.org/10.1109/ECTC.2002.1008099","url":null,"abstract":"Micro-Electro-Mechanical-Systems (MEMS) are integrated systems combining electrical and mechanical components, which are fabricated using integrated circuit (IC) batch processing techniques. The influence of MEMS is made possible through their benefits in functionality, size, and reliability. In spite of these remarkable and promising achievements in the field of microsystem fabrication, the commercialization of proven devices are lagged far behind expectations, considerably due to high packaging cost, improper packaging design solution and high testing cost. This paper is focused on suggesting and demonstrating a promising generic, modular, Direct-Chip-Attach (DCA), low cost and high reliable MEMS packaging design strategy and solution applying with high aspect ratio Through-Wafer Electrical Interconnect (TWEI). Fabrication of TWEI using dry etching is relatively new technology that can create more and better packaging options than any other conventional packaging design. The various techniques that can make through-wafer vias conductive are demonstrated and analyzed with advantages and drawbacks.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129220644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Raman spectroscopy as a stress sensor in packaging: correct formulae for different sample surfaces 拉曼光谱作为包装中的应力传感器:不同样品表面的正确公式

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008275

Jian Chen, I. De Wolf

引用次数: 13

New generation quasi-monolithic integration technology (QMIT) 新一代准单片集成技术(QMIT)

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008163

M. Joodaki, G. Kompa, H. Hillmer

{"title":"New generation quasi-monolithic integration technology (QMIT)","authors":"M. Joodaki, G. Kompa, H. Hillmer","doi":"10.1109/ECTC.2002.1008163","DOIUrl":"https://doi.org/10.1109/ECTC.2002.1008163","url":null,"abstract":"A new technology for integration of high frequency active devices into low cost silicon substrates has been introduced. The novel fabrication process gives excellent advantages such as extremely low thermal resistance, and a much lower thermal stress than the earlier QMIT concepts (Wasige et al., 1999; Joodaki et al., 2001 and 2002). This highly improves the packaging life-time and electrical characteristics of the active devices. The fabrication process is simple and compatible with fabrication of low-loss and high-Q passive elements. Successful integration of low-loss high-Q passive elements on low resistivity Si-substrates in this technology has been achieved for the first time (Joodaki et al., 2002). In comparison to the old concept of QMIT, the elimination of air-bridges in this technology not only reduces the parasitics but also enables the fabrication of the rest of the circuit after measuring the microwave characteristics of the embedded active devices. This makes very accurate microwave and millimeter-wave designs possible. Using the new fabrication process, microwave and millimeter-wave circuits (with both coplanar and microstrip lines) containing power devices have for the first time been possible.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116039008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Application of statistical tools and methods for high density substrate process development [printed circuit board fabrication] 高密度衬底工艺开发的统计工具和方法的应用[印刷电路板制造]

52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345) Pub Date : 2002-08-07 DOI: 10.1109/ECTC.2002.1008173

L. Martin, J. Frei

{"title":"Application of statistical tools and methods for high density substrate process development [printed circuit board fabrication]","authors":"L. Martin, J. Frei","doi":"10.1109/ECTC.2002.1008173","DOIUrl":"https://doi.org/10.1109/ECTC.2002.1008173","url":null,"abstract":"Statistical tools and methodologies were used in a process development application to develop the alignment process for high density substrate fabrication. Improved. capability of the alignment process was realized by reducing variation of the scale alignment mode. First, the data range of interest was determined for scale alignment mode. Then, over the determined data range of interest, the measurement capabilities of the measurement systems used in the work were determined by MSA (measurement system analysis). By use of a DOE (design of experiment), the measurement systems were determined to give significantly different measurements, indicating algorithms were necessary to translate available data from one measurement system to the reference measurement system for reducing scaling variation in the alignment process. The available data was found to highly correlate to the reference measurement system. Subsequently, using regression modeling techniques, algorithms were developed that translated available data to scale factors for compensation of the placement of through-vias and outermetal in relation to the microvias, the identified limiting factor to alignment capability.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116320169","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0