S. Kakita, Yosinori Watanabe, D. Densmore, A. Davare, A. Sangiovanni-Vincentelli
{"title":"Functional Model Exploration for Multimedia Applications via Algebraic Operators","authors":"S. Kakita, Yosinori Watanabe, D. Densmore, A. Davare, A. Sangiovanni-Vincentelli","doi":"10.1109/ACSD.2006.8","DOIUrl":"https://doi.org/10.1109/ACSD.2006.8","url":null,"abstract":"An optimized functional design space exploration method for multimedia applications is proposed. The basis of the method is a way of representing the dependency and the concurrency of an application in a compact form exploiting algebraic operators and expressions. The optimized design process consists of mapping one of the possible expressions in the application space onto a concurrent architecture. We use the metropolis design framework to demonstrate the effectiveness of the procedure using an FPGA architecture as the target implementation platform. The advantage of using this platform is the availability of models that approximate well the performance of the final implementation when performing the mapping from function to architecture thus yielding a robust design methodology","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122327883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. H. Ghamarian, M. Geilen, S. Stuijk, T. Basten, B. Theelen, M. Mousavi, A. Moonen, M. Bekooij
{"title":"Throughput Analysis of Synchronous Data Flow Graphs","authors":"A. H. Ghamarian, M. Geilen, S. Stuijk, T. Basten, B. Theelen, M. Mousavi, A. Moonen, M. Bekooij","doi":"10.1109/ACSD.2006.33","DOIUrl":"https://doi.org/10.1109/ACSD.2006.33","url":null,"abstract":"Synchronous data flow graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for application mapping on platforms. Throughput analysis of these SDFGs is an important step for verifying throughput requirements of concurrent real-time applications, for instance within design-space exploration activities. Analysis of SDFGs can be hard, since the worst-case complexity of analysis algorithms is often high. This is also true for throughput analysis. In particular, many algorithms involve a conversion to another kind of data flow graph, the size of which can be exponentially larger than the size of the original graph. In this paper, we present a method for throughput analysis of SDFGs, based on explicit state-space exploration and we show that the method, despite its worst-case complexity, works well in practice, while existing methods often fail. We demonstrate this by comparing the method with state-of-the-art cycle mean computation algorithms. Moreover, since the state-space exploration method is essentially the same as simulation of the graph, the results of this paper can be easily obtained as a byproduct in existing simulation tools","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"33 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114050175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jörg Kreiker, Ina Schaefer, Tobe Toben, B. Westphal
{"title":"Specification and Verification of Dynamic Communication Systems","authors":"Jörg Kreiker, Ina Schaefer, Tobe Toben, B. Westphal","doi":"10.1109/ACSD.2006.29","DOIUrl":"https://doi.org/10.1109/ACSD.2006.29","url":null,"abstract":"Dynamic communication systems (DCS) are complex because of their unboundedness in several dimensions. They have an unbounded and changing number of objects, a dynamically changing communication topology and unbounded message queues for asynchronous communication. We present a specification language for DCS that captures these features but is still amenable for formal verification. The verification of relevant properties of DCS is demonstrated using a combination of model-checking and abstract interpretation. Our approach is illustrated using the application domain of car platoons","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130376059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Cong Liu, A. Kondratyev, Yosinori Watanabe, J. Desel, A. Sangiovanni-Vincentelli
{"title":"Schedulability Analysis of Petri Nets Based on Structural Properties","authors":"Cong Liu, A. Kondratyev, Yosinori Watanabe, J. Desel, A. Sangiovanni-Vincentelli","doi":"10.1109/ACSD.2006.22","DOIUrl":"https://doi.org/10.1109/ACSD.2006.22","url":null,"abstract":"A schedule of a Petri net (PN) represents a set of firing sequences that can be infinitely repeated within a bounded state space, regardless of the outcomes of the nondeterministic choices. Schedulability analysis for a given PN answers the question whether a schedule exists in the reachability space of this net. This paper suggests a novel approach for schedulability analysis based solely on PN structure. It shows that unschedulability can be caused by a structural relation among transitions modelling nondeterministic choices. A method based on linear programming for checking this relation is proposed. This paper also presents a necessary condition for schedulability based on the rank of the incidence matrix of the underlying PN. These results shed a light on the sources of unschedulability often found in PN models of embedded multimedia systems","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128527232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mark Schäfer, W. Vogler, Ralf Wollowski, Victor Khomenko
{"title":"Strategies for Optimised STG Decomposition","authors":"Mark Schäfer, W. Vogler, Ralf Wollowski, Victor Khomenko","doi":"10.1109/ACSD.2006.30","DOIUrl":"https://doi.org/10.1109/ACSD.2006.30","url":null,"abstract":"When synthesising an asynchronous circuit from an STG, one often encounters the state explosion problem. In order to alleviate this problem one can decompose the STG into smaller components. This paper deals with the decomposition method of (W. Vogler et al., 2005), (W. Vogler et al., 2002) and introduces several strategies for efficient implementations, proves them correct and compares them by means of benchmark examples","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129119558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synchronous + Concurrent + Sequential = Earlier than + Not later than","authors":"G. Juhás, R. Lorenz, S. Mauser","doi":"10.1109/ACSD.2006.31","DOIUrl":"https://doi.org/10.1109/ACSD.2006.31","url":null,"abstract":"In this paper, we show how to obtain causal semantics distinguishing \"earlier than\" and \"not later than\" causality between events from algebraic semantics of Petri nets. Janicki and Koutny introduced so called stratified order structures (so-structures) to describe such causal semantics. To obtain algebraic semantics, we redefine our own algebraic approach generating rewrite terms via partial operations of synchronous composition, concurrent composition and sequential composition. These terms are used to produce so-structures which define causal behavior consistent with the (operational) step semantics. For concrete Petri net classes with causal semantics derived from processes minimal so-structures obtained from rewrite terms coincide with minimal so-structures given by processes. This is demonstrated exemplarily for elementary nets with inhibitor arcs","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132213520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synthesis of Synchronous Interfaces","authors":"Purandar Bhaduri, S. Ramesh","doi":"10.1109/ACSD.2006.32","DOIUrl":"https://doi.org/10.1109/ACSD.2006.32","url":null,"abstract":"Reuse of IP blocks has been advocated as a means to conquer the complexity of today's system-on-chip (SoC) designs. Component integration and verification in such systems is a cumbersome and time consuming process. We present synchronous interface automata (SIA) as a framework for modelling communication aspects of IP blocks, to serve as a unifying model in the top-down refinement, synthesis and verification stages of the design process. We show how to formally specify component composition and protocol compatibility in our model, and how we can apply the model to the problem of synthesising converters for incompatible protocols of interaction between IP blocks. Our model is based on the game theoretic framework of interface automata, suitably adapted for practical modelling of IP blocks","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133839608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Davide Cerotti, D. D'Aprile, S. Donatelli, J. Sproston
{"title":"Verifying Stochastic Well-formed Nets with CSL Model-Checking Tools","authors":"Davide Cerotti, D. D'Aprile, S. Donatelli, J. Sproston","doi":"10.1109/ACSD.2006.36","DOIUrl":"https://doi.org/10.1109/ACSD.2006.36","url":null,"abstract":"Model-checking algorithms for continuous stochastic logic (CSL) properties have been introduced to facilitate the verification of stochastic systems against a variety of formally-defined performance indices. In this paper, we consider the application of CSL model-checking methods and tools to stochastic well-formed nets (SWN), a colored extension of stochastic Petri nets (SPN). Our approach is to connect an existing tool for the description and performance analysis of SWN, called GREATSPN, to two model-checking tools for CSL properties, namely PRISM and MRMC. We illustrate our approach using a simple example of resource usage. As a by-product of the implementation of the model translation from GREATSPN to PRISM, a method for unfolding SWN models into SPN models has been implemented, as a standalone, re-usable component","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129762773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Communicating with Synchronized Environments","authors":"T. Seceleanu, A. Jantsch","doi":"10.1109/ACSD.2006.3","DOIUrl":"https://doi.org/10.1109/ACSD.2006.3","url":null,"abstract":"In the modern design environments, different modules, available in existent libraries, may obey different architectural styles and execution models. Reaching a well-behaved composition of such modules is a very important task of the system designer. In the framework of the action systems formalism, we analyze the co-existence of two models of execution, one synchronized, the other, interleaved. We devise a communication scheme, similar to the classical paradigm of polling, which allows us to model synchronized components that correctly exchange information, within the borders of a global system, with their non-synchronized partners. Derivations of such mechanisms follow specific correctness rules for refinement. We illustrate our methods on an audio system example, implementable as either a software or a hardware device","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133649102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Extended Timed Automata and Time Petri Nets","authors":"P. Bouyer, P. Reynier, S. Haddad","doi":"10.1109/ACSD.2006.6","DOIUrl":"https://doi.org/10.1109/ACSD.2006.6","url":null,"abstract":"Timed automata (TA) and time Petri nets (TPN) are two well-established formal models for real-time systems. Recently, a linear transformation of TA to TPNs preserving reachability properties and timed languages has been proposed, which does however not extend to larger classes of TA which would allow diagonal constraints or more general resets of clocks. Though these features do not add expressiveness, they yield exponentially more concise models. In this work, we propose two translations: one from extended TA to TPNs whose size is either linear or quadratic in the size of the original TA, depending on the features which are allowed; another one from a parallel composition of TA to TPNs, which is also linear. As a consequence, we get that TPNs are exponentially more concise than TA","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134157990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}