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Sixth International Conference on Application of Concurrency to System Design (ACSD'06)最新文献

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New features in CPN-AMI 3: focusing on the analysis of complex distributed systems CPN-AMI 3的新特性:专注于复杂分布式系统的分析
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.15
Alexandre Hamez, L. Hillah, F. Kordon, Alban Linard, E. Paviot-Adet, X. Renault, Y. Thierry-Mieg
{"title":"New features in CPN-AMI 3: focusing on the analysis of complex distributed systems","authors":"Alexandre Hamez, L. Hillah, F. Kordon, Alban Linard, E. Paviot-Adet, X. Renault, Y. Thierry-Mieg","doi":"10.1109/ACSD.2006.15","DOIUrl":"https://doi.org/10.1109/ACSD.2006.15","url":null,"abstract":"Due to the state-space size explosion problem, behavioral analysis techniques are difficult to scale up to industrial size problems. Our group couples research on analysis tools with an introspection on modeling and software engineering techniques. CPN-AMI is an integrated development and analysis environment dedicated to Petri nets. The numerous services it offers are built by a homogeneous integration of tools developed internally, and third-party tools from partner universities. These tools include state of the art algorithms and data-structures. This third major release offers better support for modeling and analysis of very large systems","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122152530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 40
Yasper: a tool for workflow modeling and analysis Yasper:一个工作流建模和分析工具
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.37
K. V. Hee, Olivia Oanea, R. Post, L. Somers, J. V. D. Werf
{"title":"Yasper: a tool for workflow modeling and analysis","authors":"K. V. Hee, Olivia Oanea, R. Post, L. Somers, J. V. D. Werf","doi":"10.1109/ACSD.2006.37","DOIUrl":"https://doi.org/10.1109/ACSD.2006.37","url":null,"abstract":"This paper presents Yasper, a tool for modeling, analyzing and simulating workflow systems, based on Petri nets. Yasper puts Petri net modeling in the hands of business analysts and software architecture designers. They can specify systems in familiar terms (XOR choice, workflow, cases, roles, processing time and cost), and can directly run manual and automatic simulations on the resulting models to analyze correctness and performance. Yasper was designed to cooperate with other tools, such as Petri net analyzers, and off-the-shelf software for data (color) handling and forms handling","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123943594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 48
On the Complexity of Consistency and Complete State Coding for Signal Transition Graphs 信号转换图的一致性和完全状态编码的复杂性
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.17
J. Esparza, P. Jančar, Alexander Miller
{"title":"On the Complexity of Consistency and Complete State Coding for Signal Transition Graphs","authors":"J. Esparza, P. Jančar, Alexander Miller","doi":"10.1109/ACSD.2006.17","DOIUrl":"https://doi.org/10.1109/ACSD.2006.17","url":null,"abstract":"Signal transition graphs (STGs) are a popular formalism for the specification of asynchronous circuits. A necessary condition for the implementability of an STG is the existence of a consistent and complete state encoding. For an important subclass of STGs, the marked graph STGs, we show that checking consistency is polynomial, but checking the existence of a complete state coding is co-NP-complete. In fact, co-NP-completeness already holds for acyclic and 1-bounded marked graph STGs and for live and 1-bounded marked graph STGs. We add some relevant results for free-choice, bounded, and general STGs","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117353613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Models of Computation for Networks on Chip 片上网络的计算模型
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.14
A. Jantsch
{"title":"Models of Computation for Networks on Chip","authors":"A. Jantsch","doi":"10.1109/ACSD.2006.14","DOIUrl":"https://doi.org/10.1109/ACSD.2006.14","url":null,"abstract":"Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making the implementation of these services entirely irrelevant for system design, an effective separation of system design from component design can be achieved. We discuss the principles to formulate network-on-chip services to establish an abstract computational model that exposes all relevant properties of the platform's functionality, performance and power consumption while hiding all irrelevant implementation details. As in many other successful abstractions, these principles are based on separating functionality from time and power aspects to allow for reasoning about these properties at the system level. As a concrete example we formulate a MoC for the Nostrum NoC. It is based on guaranteed bandwidth (GB) and best effort (BE) traffic. The MoC characterizes both GB and BE traffic in terms of closed formulas and allows for efficient composition of traffic","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116991613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 45
Asynchronous Packet-Switching for Networks-on-Chip 片上网络的异步分组交换
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.1
Jun Xu, R. Sotudeh, M. B. Josephs
{"title":"Asynchronous Packet-Switching for Networks-on-Chip","authors":"Jun Xu, R. Sotudeh, M. B. Josephs","doi":"10.1109/ACSD.2006.1","DOIUrl":"https://doi.org/10.1109/ACSD.2006.1","url":null,"abstract":"System-on-chip design is facing increasing challenges in its integration, global wiring delay and power dissipation. Interconnection network technology has the advantage over conventional bus technology in its scalability; on the other hand, asynchronous circuit design technology may offer power saving and tackle the clock-skew problem. Chip designers are thus turning their attention to network-on-chip solutions. Packet-switches play a key role in interconnection networks and this paper focuses on their implementation as asynchronous circuits. The results of experiments run to evaluate several aspects of the routing switch implementation are presented","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124165329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
SDF^3: SDF For Free SDF^3: SDF For Free
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.23
S. Stuijk, M. Geilen, T. Basten
{"title":"SDF^3: SDF For Free","authors":"S. Stuijk, M. Geilen, T. Basten","doi":"10.1109/ACSD.2006.23","DOIUrl":"https://doi.org/10.1109/ACSD.2006.23","url":null,"abstract":"SDF^3 is a tool for generating random Synchronous DataFlow Graphs (SDFGs), if desirable with certain guaranteed properties like strongly connectedness. It includes an extensive library of SDFG analysis and transformation algorithms as well as functionality to visualize them. The tool can create SDFG benchmarks that mimic DSP or multimedia applications.","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128113648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 306
Concurrency in Distributed Systems under Autonomous and Enforced Actions 自治和强制操作下分布式系统的并发性
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.4
A. Wedig, H. Wedde, Anca M. Lazarescu, E. Rotaru
{"title":"Concurrency in Distributed Systems under Autonomous and Enforced Actions","authors":"A. Wedig, H. Wedde, Anca M. Lazarescu, E. Rotaru","doi":"10.1109/ACSD.2006.4","DOIUrl":"https://doi.org/10.1109/ACSD.2006.4","url":null,"abstract":"Recently, the formal approach of I-systems has been newly established through an abstract axiomatic system where events in system components are solely derived and defined from their bilateral interaction with other components as well as from the autonomy as found in decentralized systems. As a major difference to other concurrency models we do not assume that simultaneity or coincidence of events are observable in distributed systems. (This is a fundamental practical problem in autonomous decentralized systems.) We respect this by defining concurrency of events as a system-wide or global concept of causal independence which will be given and characterized by bilateral interaction properties about the components involved, detectable through local checks only. A novel concept of conflicting actions will be given as well. While not complementary to concurrency (as often understood in the area of Petri nets) concurrency and conflict will be complemented to constitute fundamental relationships between distributed events, through a new relation termed 'event funneling'. Practice-related issues related to this fine-grained event structure will be discussed","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132095471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Minimal Counterexamples in O(n log n) Memory and O(n^2) Time O(n log n)内存和O(n^2)时间内的最小反例
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.11
Henri Hansen, Antti Kervinen
{"title":"Minimal Counterexamples in O(n log n) Memory and O(n^2) Time","authors":"Henri Hansen, Antti Kervinen","doi":"10.1109/ACSD.2006.11","DOIUrl":"https://doi.org/10.1109/ACSD.2006.11","url":null,"abstract":"This article presents a new algorithm for finding a minimal counterexample in explicit state model checking with Buchi automata. The algorithm is an interleaved breadth-first search that explores some transitions backwards. We prove the correctness of our algorithm, along with complexity results. The worst-case time consumption of a simple version of our algorithm is proportional to the number of states and transitions, times the number of Buchi states. We also derive some simple yet efficient ways of reducing the search using the mathematical properties of minimal counterexamples. The properties are very general, and should be applicable to other approaches as well","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124665204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings 基于STG展开的信号插入和并发减少编码冲突解决
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.21
Victor Khomenko, A. Madalinski, A. Yakovlev
{"title":"Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings","authors":"Victor Khomenko, A. Madalinski, A. Yakovlev","doi":"10.1109/ACSD.2006.21","DOIUrl":"https://doi.org/10.1109/ACSD.2006.21","url":null,"abstract":"A combined framework for the resolution of encoding conflicts in STG unfoldings is presented, which extends previous work by incorporating concurrency reduction in addition to signal insertion. Furthermore, a novel validity condition is proposed to justify these transformations. The method has been implemented in the CONFRES tool and applied to a number of case studies. The experimental results show that the combined framework enlarges the design space and allows better exploration of the speed/area tradeoff","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124003444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Modelling Mobility with UML2.0 and PEPA Nets 用UML2.0和PEPA网建模流动性
Sixth International Conference on Application of Concurrency to System Design (ACSD'06) Pub Date : 2006-06-28 DOI: 10.1109/ACSD.2006.13
L. Kloul, J. Bowles
{"title":"Modelling Mobility with UML2.0 and PEPA Nets","authors":"L. Kloul, J. Bowles","doi":"10.1109/ACSD.2006.13","DOIUrl":"https://doi.org/10.1109/ACSD.2006.13","url":null,"abstract":"We show how UML2.0 together with PEPA nets can be used to model dynamic aspects of mobile applications. UML2.0 provides a new form of high-level description of interactions called interaction overview diagram. The combination of interaction overview diagrams and sequence diagrams is naturally translated into PEPA nets, a performance modelling language. In this way, the designers using UML can analyse their models formally using available tools for PEPA nets","PeriodicalId":282333,"journal":{"name":"Sixth International Conference on Application of Concurrency to System Design (ACSD'06)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124108655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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