2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX)最新文献

A power-efficient FPGA accelerator: Systolic array with cache-coherent interface for pair-HMM algorithm 一种高能效FPGA加速器:用于成对hmm算法的缓存相干接口收缩阵列

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503681

Megumi Ito, Moriyoshi Ohara

引用次数: 29

MuCCRA4-BB: A fine-grained body biasing capable DRP MuCCRA4-BB:一个细粒度的身体偏置能力的DRP

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503676

Johannes Maximilian Kühn, Akram Ben Ahmed, Hayate Okuhara, H. Amano, O. Bringmann, W. Rosenstiel

引用次数: 5

ASIC design of MUL-RED Radix-2 Pipeline FFT circuit for 802.11ah system 802.11ah系统multi - red Radix-2 Pipeline FFT电路的ASIC设计

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503678

T. Tran, Soichiro Kanagawa, D. Nguyen, Y. Nakashima

引用次数: 14

Panel discussions “computing and communication evolution for IoT innovations” 小组讨论“物联网创新的计算和通信演进”

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503673

H. Nishi

引用次数: 0

Powering-off DRAM with aggressive page-out to storage-class memory in low power virtual memory system 在低功耗虚拟内存系统中，关闭具有主动分页到存储级内存的DRAM

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503675

Yusuke Shirota, S. Yoshimura, S. Shirai, Tatsunori Kanai

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引用次数: 1

A 1.1 mW 32-thread artificial intelligence processor with 3-level transposition table and on-chip PVT compensation for autonomous mobile robots 一种1.1 mW 32线程人工智能处理器，具有3级换位表和片上PVT补偿

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503671

Youchang Kim, Dongjoo Shin, Jinsu Lee, H. Yoo

引用次数: 0

An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream 一种高效的并行多核ADAS处理器，具有鲁棒的视觉注意力和工作负载预测DVFS，用于实时高清立体声流

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503672

K. Lee, Kyeongryeol Bong, Changhyeon Kim, Junyoung Park, H. Yoo

引用次数: 1

How SIMD width affects energy efficiency: A case study on sorting SIMD宽度如何影响能源效率:分拣的案例研究

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503679

H. Inoue

引用次数: 11

A cache partitioning mechanism to protect shared data for CMPs 一种缓存分区机制，用于保护cmp的共享数据

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503674

Masayuki Sato, Shin Nishimura, Ryusuke Egawa, H. Takizawa, Hiroaki Kobayashi

引用次数: 2

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing 193 MOPS/mW @ 162 MOPS, 0.32V至1.15V电压范围多核加速器，用于节能并行和顺序数字处理

2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX) Pub Date : 2016-04-20 DOI: 10.1109/CoolChips.2016.7503670

D. Rossi, A. Pullini, Igor Loi, Michael Gautschi, Frank K. Gürkaynak, A. Teman, J. Constantin, A. Burg, I. Panades, E. Beigné, F. Clermidy, F. Abouzeid, P. Flatresse, L. Benini

引用次数: 38