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International Symposium on VLSI Design and Test最新文献

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Design and Calibration of 14-bit 10 KS/s Low Power SAR ADC for Bio-medical Applications 生物医学用14位10ks /s低功耗SAR ADC的设计与标定
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_49
Yadukrishnan Mekkattillam, Satyajit Mohapatra, N. Mohapatra
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引用次数: 3
Low Leakage Read Write Enhanced 9T SRAM Cell 低泄漏读写增强9T SRAM单元
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_47
Pratiksha Shukla, Vinay Gupta, M. Pattanaik
{"title":"Low Leakage Read Write Enhanced 9T SRAM Cell","authors":"Pratiksha Shukla, Vinay Gupta, M. Pattanaik","doi":"10.1007/978-981-13-5950-7_47","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_47","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116971800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Source Hotspot Management in a Mesh Network on Chip 片上Mesh网络中的源热点管理
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_51
S. Ajay, G. SatyaSaiKrishnaMohan, S.Srikiran Rao, Sujay B Shaunak, K. KrutthikaH., R. AnandaY., John Jose
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引用次数: 0
3D LBDR: Logic-Based Distributed Routing for 3D NoC 3D LBDR:基于逻辑的3D NoC分布式路由
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_40
Ashish Sharma, M. Tailor, Lava Bhargava, M. Gaur
{"title":"3D LBDR: Logic-Based Distributed Routing for 3D NoC","authors":"Ashish Sharma, M. Tailor, Lava Bhargava, M. Gaur","doi":"10.1007/978-981-13-5950-7_40","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_40","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116723481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region 亚阈值区域的电源和温度无关电压参考电路
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_10
Vineysarathi Kokkula, Akash Joshi, R. Deshmukh
{"title":"Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region","authors":"Vineysarathi Kokkula, Akash Joshi, R. Deshmukh","doi":"10.1007/978-981-13-5950-7_10","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_10","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129780147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fabrication of Molybdenum MEMs Structures Using Dry and Wet Etching 干湿刻蚀法制备钼MEMs结构
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_22
S. Chauhan, J. Niharika, M. Joglekar, S. Manhas
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引用次数: 2
Automation of Timing Quality Checks and Optimization 定时质量检查和优化的自动化
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_30
Dubakula Ketavanya, A. Darji
{"title":"Automation of Timing Quality Checks and Optimization","authors":"Dubakula Ketavanya, A. Darji","doi":"10.1007/978-981-13-5950-7_30","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_30","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127663946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Threshold Voltage Investigation of Recessed Dual-Gate MISHEMT: Simulation Study 嵌入式双栅MISHEMT的阈值电压研究:仿真研究
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_33
Preeti Singh, V. Kumari, M. Saxena, Mridula Gupta
{"title":"Threshold Voltage Investigation of Recessed Dual-Gate MISHEMT: Simulation Study","authors":"Preeti Singh, V. Kumari, M. Saxena, Mridula Gupta","doi":"10.1007/978-981-13-5950-7_33","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_33","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"120 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125754197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Parameter Extraction of PSP MOSFET Model Using Particle Swarm Optimization - SoC Approach 基于粒子群优化SoC方法的PSP MOSFET模型参数提取
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_41
Amit Rathod, R. Thakker
{"title":"Parameter Extraction of PSP MOSFET Model Using Particle Swarm Optimization - SoC Approach","authors":"Amit Rathod, R. Thakker","doi":"10.1007/978-981-13-5950-7_41","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_41","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132141926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A PVT Insensitive Low-Power Differential Ring Oscillator 一种PVT不敏感低功率差动环振荡器
International Symposium on VLSI Design and Test Pub Date : 2018-06-28 DOI: 10.1007/978-981-13-5950-7_7
Nishtha Wadhwa, P. Bahubalindruni, Sujay Deb
{"title":"A PVT Insensitive Low-Power Differential Ring Oscillator","authors":"Nishtha Wadhwa, P. Bahubalindruni, Sujay Deb","doi":"10.1007/978-981-13-5950-7_7","DOIUrl":"https://doi.org/10.1007/978-981-13-5950-7_7","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114487790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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