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2018 76th Device Research Conference (DRC)最新文献

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High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD down to 0.2V 高性能互补黑磷场效应管和逆变电路工作在创纪录的低VDD低至0.2V
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442224
Peng Wu, J. Appenzeller
{"title":"High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD down to 0.2V","authors":"Peng Wu, J. Appenzeller","doi":"10.1109/DRC.2018.8442224","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442224","url":null,"abstract":"Black phosphorus (BP) has attracted wide interest for electronic applications due to its unique properties such as an ultra-thin body, high mobility and a tunable bandgap [1]–[3]. However, most BP transistors exhibit p-type conduction due to Fermi level line-up of the source and drain electrodes close to the valence band [2], which is unfavorable for n-type characteristics and hinders employing BP in CMOS integrated circuits. Here, we report record high performance $n$-type BP FETs enabled by a careful partial double-gate design and contact work function engineering, which exhibit ON-currents $(mathrm{I}_{mathrm{ON}}$ of $60mu mathrm{A}/mu mathrm{m}$ at $mathrm{V}_{mathrm{D}}=0.8mathrm{V}$, a minimum subthreshold swing (SS) of 88mV/dec and ON/OFF ratios of $>10^{4}$. Inverter circuits built from these novel complementary BP FETs exhibit a record high maximum gain of 21.1 and allows inverter operation down to VDD of 0.2V.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122232816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Alleviation of Short Channel Effects in Ge Negative Capacitance pFinFETs Ge负电容pfinfet中短通道效应的缓解
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442247
W. Chung, M. Si, P. Ye
{"title":"Alleviation of Short Channel Effects in Ge Negative Capacitance pFinFETs","authors":"W. Chung, M. Si, P. Ye","doi":"10.1109/DRC.2018.8442247","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442247","url":null,"abstract":"In order to overcome the Boltzmann's tyranny, where subthreshold slope (SS) of a MOSFET is limited at a minimum of 60 mV/dec at room temperature, various device schemes utilizing different current transport mechanisms and novel materials were studied extensively [1], [2]. Among these candidates, incorporation of ferroelectric (FE) oxides along with capacitance-matched gate stacks helped realize the hysteresis-free negative capacitance (NC) FETs with bi-directional sub-60mV/dec SS [3], [4]. It has been discussed that these NCFETs not only give reduced SS but also show negative DIBL due to its nature of NC [5]. This could possibly lead to higher tolerance towards the conventional short channel effects (SCEs) such as steep increase in SS, DIBL and VT roll-off with scaling of channel length. However, such robustness to SCEs has not been carefully studied in the state-of-the-art Germanium NCFETs. In this paper, more than hundreds of devices were carefully measured with respect to channel length and device parameters were extracted so that such properties could be seen more explicitly. The NCFETs' parameters (SS, DIBL, VT) were compared directly with our reported Ge pFinFETs with conventional high-k dielectric [6] to graphically show the advantage of NC Ge FinFETs over the conventional Ge FinFETs.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"34 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125719205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Redefining Responsivity in Graphene-based Schottky Diodes 石墨烯基肖特基二极管响应性的重新定义
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442228
S. Riazimeher, S. Kataria, J. Gonzalez, M. Shaygan, S. Suckow, O. Engström, F. Ruiz, A. Godoy, M. Lemme
{"title":"Redefining Responsivity in Graphene-based Schottky Diodes","authors":"S. Riazimeher, S. Kataria, J. Gonzalez, M. Shaygan, S. Suckow, O. Engström, F. Ruiz, A. Godoy, M. Lemme","doi":"10.1109/DRC.2018.8442228","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442228","url":null,"abstract":"Graphene has great potential in flexible and rigid optoelectronic devices due to its atomic thickness (and hence flexibility), high conductivity and broadband transparency [1], [2]. Graphene forms a Schottky junction with semiconductor materials, which can be exploited as simple photodiodes [3], [4]. Recently, it was reported that insulated regions in graphene/silicon (G/Si) photodiodes, e.g. regions separated by oxides to allow contacting the graphene, have a significant contribution towards the extracted photocurrent [5], [6]. Based on these findings, we have optimized the design of graphene-based photodiodes. Here, we report on these graphene/silicon Schottky diodes with very high responsivity, including analysis of the spectral “fingerprint”. Scanning photocurrent measurements (SPCM) support our claims as they provide local spatial distributions of photocurrents in the devices. Based on our experiments, we revisit the extraction of responsivity in previous literature, where the insulating regions have been largely ignored when calculating it. This leads to a distinct overestimation of responsivity.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125738211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unique Features of Electron Transport and Low-Frequency Noise in Quasi-One-Dimensional ZrTe3 van der Waals Nanoribbons 准一维ZrTe3范德华纳米带中电子输运和低频噪声的独特特性
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442263
A. Geremew, M. Bloodgood, T. Salguero, S. Rumyantsev, A. Balandin
{"title":"Unique Features of Electron Transport and Low-Frequency Noise in Quasi-One-Dimensional ZrTe3 van der Waals Nanoribbons","authors":"A. Geremew, M. Bloodgood, T. Salguero, S. Rumyantsev, A. Balandin","doi":"10.1109/DRC.2018.8442263","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442263","url":null,"abstract":"This work was supported, in part, by the Semiconductor Research Corporation (SRC) contract 2018-NM-2796: One-Dimensional Single-Crystal van-der-Waals Metals: Ultimately-Downscaled Interconnects with Exceptional Current-Carrying Capacity and Reliability, and by the National Science Foundation (NSF) through the Emerging Frontiers of Research Initiative (EFRI) 2-DARE award EFRI-1433395: Novel Switching Phenomena in Atomic MX2 Heterostructures for Multifunctional Applications.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125789664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Graphene-Channel-Transistor Terahertz Amplifier 石墨烯通道晶体管太赫兹放大器
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442272
S. Boubanga-Tombet, D. Yadav, W. Knap, V. Popov, T. Otsuji
{"title":"Graphene-Channel-Transistor Terahertz Amplifier","authors":"S. Boubanga-Tombet, D. Yadav, W. Knap, V. Popov, T. Otsuji","doi":"10.1109/DRC.2018.8442272","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442272","url":null,"abstract":"The generation and amplification of terahertz (THz) electromagnetic waves by plasmonic instabilities in conventional two-dimensional (2D) electron systems (2DESs) have been actively investigated since 1980 [1]. However, after about forty years, we are still a long way from the realization of efficient emitters and amplifiers [2]. The rise of graphene and its extremely strong light-plasmon coupling and superior carrier transport properties make this work worth to be revisited [3]. We investigate dc current driven plasmonic instabilities in high mobility graphene-channel field-effect transistors (GFETs) working for tunable THz amplifier at room temperature (RT).","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128839884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Advanced Devices 先进的设备
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/drc.2018.8442265
{"title":"Advanced Devices","authors":"","doi":"10.1109/drc.2018.8442265","DOIUrl":"https://doi.org/10.1109/drc.2018.8442265","url":null,"abstract":"","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117036832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations 基于场效应晶体管的内存处理体系结构求解分布式最小二乘优化
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442235
Insik Yoon, Muya Chang, K. Ni, M. Jerry, S. Gangopadhyay, Gus Henry Smith, Tomer Hamam, V. Narayanan, J. Romberg, Shih-Lien Lu, S. Datta, A. Raychowdhury
{"title":"A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations","authors":"Insik Yoon, Muya Chang, K. Ni, M. Jerry, S. Gangopadhyay, Gus Henry Smith, Tomer Hamam, V. Narayanan, J. Romberg, Shih-Lien Lu, S. Datta, A. Raychowdhury","doi":"10.1109/DRC.2018.8442235","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442235","url":null,"abstract":"Hf02 based ferroelectric FET (FeFET) has recently received great interest for its application in nonvolatile memory (NVM) [1]. Unlike conventional perovskite based ferroelectric materials, Hf02 is CMOS compatible and retains ferroelectricity for thin film with thickness around 10 nm. Therefore, successful integration of ferroelectric Hf02 into advanced CMOS technology makes this technology highly promising for NVM [1]. Moreover, by tuning the portion of switched ferroelectric domain, a FeFET can exhibit multiple intermediate states, which enables its application as an analog conductance in mixed-signal in-memory computing. Currently, such architectures have been applied to neuromorphic computing [2], [3]. In this paper, we present a processing-in-memory (PIM) architecture with FeFETs and demonstrate how this can be used to solve a new class of optimization problems, in particular, distributed least square minimization.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122617593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Low Power Nanoscale Switching of VO2using Carbon Nanotube Heaters 使用碳纳米管加热器的低功耗纳米级vo2开关
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442223
S. Bohaichuk, M. Muñoz-Rojo, G. Pitner, C. McClellan, Feifei Lian, Jason Li, Jaewoo Jeong, M. Samant, S. Parkin, H. Wong, E. Pop
{"title":"Low Power Nanoscale Switching of VO2using Carbon Nanotube Heaters","authors":"S. Bohaichuk, M. Muñoz-Rojo, G. Pitner, C. McClellan, Feifei Lian, Jason Li, Jaewoo Jeong, M. Samant, S. Parkin, H. Wong, E. Pop","doi":"10.1109/DRC.2018.8442223","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442223","url":null,"abstract":"Vanadium dioxide (VO2) is attractive for a variety of applications in optics and electronics, due to its abrupt insulator-metal transition (IMT) with $> 10^{3}times$ change in resistance near room temperature. Use of VO2 in devices will require low power switching, with knowledge of the transition mechanism and behaviour down to nanoscale dimensions. To address this challenge, we use metallic carbon nanotubes (CNTs) with diameter ~1 nm [1] to probe nanoscale IMT in VO2 for the first time. We find that a single CNT locally switches the VO2 at less than half the voltage and power otherwise required. Furthermore, to understand the nanoscale IMT we use scanning probe microscopy (SPM) techniques to study devices during operation.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115523309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Steep-Slope and NC 2D Devices 陡坡和数控二维器件
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/drc.2018.8444104
{"title":"Steep-Slope and NC 2D Devices","authors":"","doi":"10.1109/drc.2018.8444104","DOIUrl":"https://doi.org/10.1109/drc.2018.8444104","url":null,"abstract":"","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126325812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Towards scalable silicon quantum computing 走向可扩展的硅量子计算
2018 76th Device Research Conference (DRC) Pub Date : 2018-06-01 DOI: 10.1109/DRC.2018.8442198
M. Vinet, L. Hutin, B. Bertrand, H. Bohuslavskyi, A. Corna, A. Amisse, A. Crippa, L. Bourdet, R. Maurand, S. Barraud, M. Urdampilleta, C. Bauerle, M. Sanquer, X. Jehl, Y. Niquet, S. D. Franceschi, T. Meunier
{"title":"Towards scalable silicon quantum computing","authors":"M. Vinet, L. Hutin, B. Bertrand, H. Bohuslavskyi, A. Corna, A. Amisse, A. Crippa, L. Bourdet, R. Maurand, S. Barraud, M. Urdampilleta, C. Bauerle, M. Sanquer, X. Jehl, Y. Niquet, S. D. Franceschi, T. Meunier","doi":"10.1109/DRC.2018.8442198","DOIUrl":"https://doi.org/10.1109/DRC.2018.8442198","url":null,"abstract":"Qubits can be made out of a variety of experimental platforms, fig. 1. Small processors have already been demonstrated in trapped ions and superconductors but in both cases, the constraints for coherent manipulation and the effective large size of the qubits including all quantum functionalities are hardly compatible with very large-scale architecture. When it comes to the crucial issue of large-scale integration, Si spin qubits are well positioned due to their long coherence times and compatibility with semiconductor fabrication techniques. Indeed, dephasing times of the order of 1s have been achieved in Si-based spin qubits and single-qubit gate fidelities are high enough for scalable, fault-tolerant quantum computing.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114783364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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