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2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits最新文献

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On the fly oxide trap (otfot) concept: A new method for bias temperature instability characterization 氧化捕集器(otft)概念:一种表征偏置温度不稳定性的新方法
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306279
B. Djezzar, H. Tahi, A. Benabdelmoumene, F. Hadjlarbi, A. Chenouf
{"title":"On the fly oxide trap (otfot) concept: A new method for bias temperature instability characterization","authors":"B. Djezzar, H. Tahi, A. Benabdelmoumene, F. Hadjlarbi, A. Chenouf","doi":"10.1109/IPFA.2012.6306279","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306279","url":null,"abstract":"In this paper, a new method, named on the fly oxide trap (OTFOT), is proposed to extract the bias temperature instability BTI in MOS transistors. It is based on charge pumping technique (CP) at low and high frequencies. We emphasize on the theoretical-based concept, giving a clear insight on the easy-use of the OTFOT methodology and demonstrating its viability to characterize the negative BTI (NBTI). Using alternatively high and low frequencies, OTFOT method separates the interfacetraps (ΔNit) and border-trap (ΔNbt) (switching oxide-trap) densities independently as well as their contributions to the threshold voltage shift (ΔVth), without needing additional methods. OTFOT method can contribute to further understand the behavior of the NBTI degradation, especially through the threshold voltage shift components such as ΔVit and ΔVot caused by interface-trap and border-trap, respectively.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116261535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Failure analysis on ultra-low k film de-lamination by TOF-SIMS composition analysis 基于TOF-SIMS成分分析的超低钾薄膜脱层失效分析
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306292
H. Teo, Shuting Chen, Lei Zhu, Y. Hua, Z. X. Yuan, Y. S. Heng, Chao Yong Li
{"title":"Failure analysis on ultra-low k film de-lamination by TOF-SIMS composition analysis","authors":"H. Teo, Shuting Chen, Lei Zhu, Y. Hua, Z. X. Yuan, Y. S. Heng, Chao Yong Li","doi":"10.1109/IPFA.2012.6306292","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306292","url":null,"abstract":"A failure case study and root cause of ultra low-k film delamination was reported. TOF-SIMS composition analysis found higher concentration of carbon at the transition oxide. The clogging of the foreline flow path was identified in the process to cause the transient carbon surge, resulting in higher carbon concentration in the transition oxide and poor adhesion of the ultra low-k film.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"414 2-3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116557797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Dynamic degradation mechanisms of low temperature polycrystalline silicon thin-film transistors 低温多晶硅薄膜晶体管的动态退化机制
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306336
Mingxiang Wang, Huaisheng Wang, Meng Zhang, Xiaowei Lu
{"title":"Dynamic degradation mechanisms of low temperature polycrystalline silicon thin-film transistors","authors":"Mingxiang Wang, Huaisheng Wang, Meng Zhang, Xiaowei Lu","doi":"10.1109/IPFA.2012.6306336","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306336","url":null,"abstract":"Degradation mechanisms of low temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) under various dynamic stresses are reviewed. Dynamic hot carrier (HC) mechanism under gate and drain stress pulses is interpreted based on non-equilibrium PN junction model. For synchronized gate and drain stress pulse, both dynamic HC and self-heating (SH) mechanism are involved. For n-type TFTs, device degradation is dominated by SH at low-frequencies whereas by dynamic HC at high frequencies. Besides, for p-type TFTs, negative bias temperature instability and the dynamic HC mechanisms are both effective for the degradation.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"18 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113942161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Surface potential and electric field mapping of p-well/n-well junction by secondary electron potential contrast and in-situ nanoprobe biasing 利用二次电子势对比和原位纳米探针偏置的p阱/n阱结的表面电位和电场映射
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306277
Jeng-Han Lee, Po-Tsun Liu, M. Wang, Y. Lin, Y. Huan, D. Su
{"title":"Surface potential and electric field mapping of p-well/n-well junction by secondary electron potential contrast and in-situ nanoprobe biasing","authors":"Jeng-Han Lee, Po-Tsun Liu, M. Wang, Y. Lin, Y. Huan, D. Su","doi":"10.1109/IPFA.2012.6306277","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306277","url":null,"abstract":"This study investigates the p-well/n-well junction by using secondary electron potential contrast (SEPC) with in-situ nanoprobe biasing. Experimental result demonstrated dopant contrast is restored after applying electricity in the junction nodes. Furthermore, the image contrast was converted to a voltage scale, allowing the junction surface potential and electric filed distribution to be identified. The proposed method demonstrates that an in-situ nanoprobe system is powerful in dopant area inspection in SEM, potentially contributing to an efficient method in analyzing site-specific failure in real circuits.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122913006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
3D FinFET and other sub-22nm transistors 3D FinFET及其他sub-22nm晶体管
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306337
C. Hu
{"title":"3D FinFET and other sub-22nm transistors","authors":"C. Hu","doi":"10.1109/IPFA.2012.6306337","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306337","url":null,"abstract":"FinFET provides needed relief to ICs from performance, power, and device variation predicaments. It also provides higher carrier mobility, especially at low voltage near the threshold voltage, giving promise to practical near-threshold circuits. Another new transistor conceived simultaneously with FinFET, UTB-SOI FET, is also entering production. Together they showed a new scaling path forward: scale the body thickness in proportion to gate length.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127743076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Failure analysis on plasma charging induced damage due to effect of circuit layout & device structure marginality 由于电路布局和器件结构边缘性的影响，等离子体充电引起损伤的失效分析
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306285
F. L. Chow, A. Chin
{"title":"Failure analysis on plasma charging induced damage due to effect of circuit layout & device structure marginality","authors":"F. L. Chow, A. Chin","doi":"10.1109/IPFA.2012.6306285","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306285","url":null,"abstract":"Failure analysis on low yield cases revealed different degrees of fused polysilicon gate damage on specific CMOS circuit layout and device structure. Non-uniformity of plasma density during plasma related process has induced trapped charges in the gate oxide especially on circuit layout with large metal line perimeters and small poly gate structure. Trapped charges could become the catalyst to cause fused polysilicon gate when it is subjected to non-optimized external electrical voltage biasing condition which carries large voltage spike during transient state when integrated chip is powered up. A series of investigation was carried out in this paper to explore the failure mechanisms seen on these circuit design layouts and device structures.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134538528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Copper oxidation study by TEM 用透射电镜研究铜的氧化
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306315
S. R. Esa, R. Yahya, A. Hassan, G. Omar
{"title":"Copper oxidation study by TEM","authors":"S. R. Esa, R. Yahya, A. Hassan, G. Omar","doi":"10.1109/IPFA.2012.6306315","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306315","url":null,"abstract":"This paper studies copper oxidation using Transmission Electron Microscopy (TEM) on copper leadframe which was subjected to heat treatment process at 60°C, 120°C, 150°C, 180°C and 210°C for 0.5 hour. The TEM lamella was prepared by in-situ lift-out technique using Focused Ion Beam (FIB) followed by TEM inspection to reveal the microstructure of copper oxide. Additionally, Electron Energy Loss Spectroscopy (EELS) analysis was carried out on the copper leadframe sample that was baked at 210°C to determine the oxidation state of copper oxide.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124446766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Alternative FIB cross section and laser ablation methods to improve failure analysis throughput of copper wire moisture related reliability failures 可选择的FIB横截面和激光烧蚀方法，以提高铜线湿相关可靠性故障的失效分析吞吐量
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306278
W. F. Kho, J. L. Leow, Y. C. Cheah, Y. W. Cheah
{"title":"Alternative FIB cross section and laser ablation methods to improve failure analysis throughput of copper wire moisture related reliability failures","authors":"W. F. Kho, J. L. Leow, Y. C. Cheah, Y. W. Cheah","doi":"10.1109/IPFA.2012.6306278","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306278","url":null,"abstract":"In analysis of copper wire moisture related reliability failures long hours are spent on the FIB tool. Two techniques are introduced to reduce the long analysis time: 1) An alternative FIB trenching method that reduces milling duration by 5X and, 2) A “FIB-free” approach using laser ablation.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134422925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The link between NBTI and TDDB of high-k gate P-MOSFETs 高k栅极p - mosfet的NBTI与TDDB之间的联系
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306262
Y. Gao, D. Ang
{"title":"The link between NBTI and TDDB of high-k gate P-MOSFETs","authors":"Y. Gao, D. Ang","doi":"10.1109/IPFA.2012.6306262","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306262","url":null,"abstract":"The relationship between NBTI and TDDB of Hf-based high-k p-MOSFETs is examined. At certain NBTI stressing conditions, the conversion of switching hole traps into permanent trapped holes will occur to reduce the NBTI recovery. The conversion is shown to correspond to a degradation of the TDDB lifetime. This evidence implies switching hole traps as a common link between NBTI and TDDB.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132528850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Nanoscale physical analysis of localized breakdown events in HfO2/SiOX dielectric stacks: A correlation study of STM induced BD with C-AFM and TEM HfO2/SiOX介电堆局部击穿事件的纳米尺度物理分析:STM诱导BD与C-AFM和TEM的相关性研究
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2012-07-02 DOI: 10.1109/IPFA.2012.6306264
K. Shubhakar, K. Pey, M. Bosman, R. Thamankar, S. S. Kushvaha, Y. C. Loke, Z. Wang, N. Raghavan, X. Wu, S. O’Shea
{"title":"Nanoscale physical analysis of localized breakdown events in HfO2/SiOX dielectric stacks: A correlation study of STM induced BD with C-AFM and TEM","authors":"K. Shubhakar, K. Pey, M. Bosman, R. Thamankar, S. S. Kushvaha, Y. C. Loke, Z. Wang, N. Raghavan, X. Wu, S. O’Shea","doi":"10.1109/IPFA.2012.6306264","DOIUrl":"https://doi.org/10.1109/IPFA.2012.6306264","url":null,"abstract":"The study of scanning tunneling microscopy (STM) induced localized degradation and polarity dependent breakdown (BD) of HfO2/SiOx dielectric stacks is presented in this work, together with a correlated investigation of the BD locations by transmission electron microscopy (TEM). The localized dielectric BD events are also analysed using conductive-atomic force microscopy. The analysis of the degradation and breakdown phenomenon has been performed from a macroscopic (device) level to a localized nanometer scale BD location. A new technique is adopted to induce the degradation and BD of the HfO2/SiOx dielectric stacks locally using a combined STM/scanning electron microscopy nano-probing system. The BD locations were identified on blanket wafers and gate electrode area of the dielectric, and the sample containing these regions was prepared using focused ion beam for the physical analysis using TEM. This method of analysis is very useful in studying the nature of the BD events in dielectrics with and without the gate electrode, elucidating the role of the gate electrode in dielectric BD events.","PeriodicalId":267457,"journal":{"name":"2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117290453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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