{"title":"Linearity enhancement of oversampled pipeline A/D converters using sigma-delta modulation","authors":"J. L. Ausín, G. Torelli, J. F. Duque-Carrillo","doi":"10.1109/ECCTD.2005.1522992","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1522992","url":null,"abstract":"In pipeline analog-to-digital converters (ADCs), mismatches in the fabricated components limit their linearity. This paper describes a mismatch shaping technique that significantly mitigates this problem in pipeline ADCs with low oversampling ratio. The use of a sigma-delta coder results in a beneficial noise shaping of the in-band distortion introduced by capacitor mismatches. As a simulation example, the proposed technique is applied to a pipeline ADC with a nominal accuracy of 14 bits. Through this example, the paper demonstrates that, in the presence of component matching limitations, the technique can improve the ADC linearity without appreciable hardware complexity.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"1932 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128111008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"CMOL: possible hybrid semiconductor/nanodevice circuits","authors":"K. Likharev","doi":"10.1109/ECCTD.2005.1523037","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1523037","url":null,"abstract":"The author reviews the recent work on devices and architectures for possible hybrid semiconductor/nanodevice integrated circuits of \"CMOL\" variety. Such circuit would combine an advanced CMOS subsystem fabricated by the usual lithographic patterning with a two-layer nanowire crossbar (formed, e.g., by nanoimprinting) with the wires connected, at each crosspoint, by two-terminal nanodevices. The CMOL concept enables a combination of the advantages of its components (e.g., reliability of MOSFET transistors and minuscule footprint of nanodevices), as well as those of patterning techniques: the flexibility of the optical lithography and the potentially low cost of nanoimprinting and nanodevice formation (e.g., the chemically-directed molecular self-assembly). This powerful combination may allow CMOL circuits to reach an unparalleled device density (up to 10/sup 12/ functions per cm/sup 2/) and ultrahigh information processing performance (up to 10/sup 20/ operations per second per cm/sup 2/), at acceptable power dissipation (below 100 W/cm/sup 2/) in several digital and mixed-signal systems including terabit-scale memories, reconfigurable FPGA-like logic circuits, and neuromorphic networks. The main challenges on the way toward practical CMOL systems is the fabrication of highly reproducible nanodevices and the improvement of CMOL circuit architectures.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128111081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On phase pattern transition in star-coupled Wien-bridge oscillators with parameter deviations","authors":"S. Moro, Tadashi Matsumoro","doi":"10.1109/ECCTD.2005.1522981","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1522981","url":null,"abstract":"In this study, we investigate the basins of attraction of the phase patterns and clarify the effect of parameter deviations in pulse-driven star-coupled Wien-bridge oscillators with parameter deviations. From the simulation results, it is shown that some phase pattern can be seen easily and the others can be hardly seen because of the deviations. Moreover, the reachability problems of the phase patterns suggest that these systems can treat not only the spatial phase patterns but the spatio-temporal patterns.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130014876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A flexible architecture for image reconstruction in H.264/AVC decoders","authors":"A. Luczak, P. Garstecki","doi":"10.1109/ECCTD.2005.1522949","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1522949","url":null,"abstract":"The H.264/AVC is the most recent standard of video compression. In this paper original and flexible architecture of image reconstruction block for H.264/AVC decoder is presented. Depending on application requirements the proposed design may be configured as low complexity simple unit with good performance or as fully pipelined construction with high performance. The architecture was implemented in Verilog HDL and synthesized and then tested on Xilinx VirtexII family device. The simulation results indicate that the implemented circuit is capable to process real-time video at clock close to the image sampling frequency.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"77 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131245353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"General solution of linear differential equations by using differential transfer matrix method","authors":"Mohammad Hadi Eghlidi, K. Mehrany, B. Rashidian","doi":"10.1109/ECCTD.2005.1523073","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1523073","url":null,"abstract":"A new analytical method for finding the general solution of the nth-order linear differential equation with variable coefficients is given based on generalizing the idea of differential transfer matrix method already proposed for solving the second order Helmholtz equation. Our generalization has two aspects. First, the given formulation copes with the nth-order linear differential equations, rather than the special case of second order wave equations. Second, the proposed approach is generalized in several different ways each yielding different types of differential transfer matrices with correspondingly different numerical accuracies. The presented methods can be applied to problems such as analysis of linear time varying systems like linear circuits with time varying elements, in homogeneous transmission lines, etc.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130979811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Variable-gain up-conversion mixer with current reuse for 5-GHz W-LAN applications","authors":"C. Presti, F. Carrara, G. Palmisano","doi":"10.1109/ECCTD.2005.1522957","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1522957","url":null,"abstract":"This paper presents an up-conversion mixer for 5-GHz W-LAN applications, whose input stage is based on a novel variable-gain transconductor. The proposed topology reduces current consumptions, through DC current reuse for mixer biasing. Moreover, a new low-consumption control circuit is introduced, which achieves a temperature-stable and linear-in-dB characteristic, providing a 40-dB dynamic range within /spl plusmn/1 dB gain error. An output 1-dB compression point of 2.4 dBm is achieved, while drawing less than 20 mA from a 3-V power supply.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115213291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"One method for linear phase lowpass IRR filter design","authors":"A. Fernández-Vázquez, G. Jovanovic-Dolecek","doi":"10.1109/ECCTD.2005.1523106","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1523106","url":null,"abstract":"This paper presents a new method for the design of exactly linear phase lowpass HR filters. The parameters of the design are: passband and stopband frequencies /spl omega//sub p/ and /spl omega//sub s/, the passband droop A/sub p/ and the stopband attenuation A/sub s/. These parameters are the same as the parameters used in the traditional IIR filter design based on analog filters. The designed IIR filter has a flat magnitude response. The proposed method is based on complex allpass filters.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124213671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis of diode-transistor circuits having multiple DC solutions","authors":"M. Tadeusiewicz, S. Hałgas","doi":"10.1109/ECCTD.2005.1523055","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1523055","url":null,"abstract":"The paper deals with circuits containing diodes and the Ebers-Moll modeled bipolar transistors. The basic and still open question of finding multiple DC solutions is discussed. To find all the DC solutions the diodes are considered as ideal and a method having combinatorial nature is applied. The main achievements of the paper are new algorithms enabling us to discard a huge number of combinations of the diodes states immediately, without any solving of equations, or by performing a considerably reduced amount of computation. The method guarantees finding all the DC solutions of the idealized diode-transistor circuits. Next each of the obtained solutions is corrected by means of a controlled SPICE simulation. A numerical example of transistor circuit is presented showing the efficiency of the proposed approach.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114962377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simplified gate level noise injection models for behavioral noise coupling simulation","authors":"J. Lundgren, T. Ytterdal, M. O’nils","doi":"10.1109/ECCTD.2005.1523131","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1523131","url":null,"abstract":"In CMOS digital logic, there are two major noise sources requiring consideration. These are a circuit's power supply current and its noise current injected into the substrate of the circuit. This paper proposes a method for modeling and estimating the noise current injected into the substrate by capacitive coupling in digital circuits. The simplicity of the model and the reduction of details in the technology libraries facilitates behavioral level noise coupling simulation. The model is exemplified and evaluated for a simple NOT gate test case, for which the accuracy and simplicity of the models show great promise for simulation at the behavioral level.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122074352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparative study of MOST resistive configurations","authors":"J. P. Alegre, S. Celma, M. T. Sanz, B. Calvo","doi":"10.1109/ECCTD.2005.1522924","DOIUrl":"https://doi.org/10.1109/ECCTD.2005.1522924","url":null,"abstract":"The purpose of this work is to carry out a comparative study between three linear MOS resistor configurations: the balanced Banu-Tsividis structure, the MOS resistive circuit, and the MOS current divider. Three MOS models have been used in Matlab simulation environment: the BSIM4, the approximate strong inversion model, and the charge-sheet model. Finally, experimental measurements have been carried out in order to draw conclusions on the relative linearity of the MOS resistive configurations under study and verify the accuracy of the available models.","PeriodicalId":266120,"journal":{"name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127210082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}