Soon-Wook Kim, Lan Peng, Andy Miller, G. Beyer, E. Beyne, Chung-Sun Lee
{"title":"Permanent wafer bonding in the low temperature by using various plasma enhanced chemical vapour deposition dielectrics","authors":"Soon-Wook Kim, Lan Peng, Andy Miller, G. Beyer, E. Beyne, Chung-Sun Lee","doi":"10.1109/3DIC.2015.7334576","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334576","url":null,"abstract":"The low temperature permanent wafer bonding is studied on the plasma enhanced chemical vapour deposited dielectrics. Three types of dielectric material (SiOx, SiOxNy, SiCxNy) were prepared by the conventional CMOS interconnection process which includes the thermal annealing and chemical mechanical polishing step. The plasma treatment generated by different inert gas was evaluated to activate the dielectric surface prior to wafer bonding. The modified surface properties were characterized by using water wettability, hydrophilicity as well as the surface roughness. The obtained surface properties have been discussed with the interface bonding energy.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129587684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Eric J. Wyers, T. R. Harris, W. S. Pitts, J. Massad, P. Franzon
{"title":"Characterization of the mechanical stress impact on device electrical performance in the CMOS and III–V HEMT/HBT heterogeneous integration environment","authors":"Eric J. Wyers, T. R. Harris, W. S. Pitts, J. Massad, P. Franzon","doi":"10.1109/3DIC.2015.7334597","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334597","url":null,"abstract":"The stress impact of the CMOS and III-V heterogeneous integration environment on device electrical performance is being characterized. Measurements from a partial heterogeneous integration fabrication run will be presented to provide insight into how the backside source vias, alternatively referred to as through-silicon-carbide vias (TSCVs), used within the heterogeneous integration environment impacts GaN HEMT device-level DC performance.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134602160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shuuichi Kariyazaki, K. Kuboyama, R. Oikawa, T. Funaya
{"title":"New signal skew cancellation method for 2 Gbps transmission in glass and organic interposers to achieve 2.5D package employing next generation high bandwidth memory (HBM)","authors":"Shuuichi Kariyazaki, K. Kuboyama, R. Oikawa, T. Funaya","doi":"10.1109/3DIC.2015.7334556","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334556","url":null,"abstract":"Glass and organic interposers have been expected as strong alternatives to Si interposer (Si-IP) from the viewpoint of package cost reduction. A 2.5-D package that consists of HBM Gen 2 and a logic die placed side by side on a glass or an organic interposer by flip-chip bonding (FCB) is studied. We have successfully developed a new signal skew cancellation method by controlling Cu plated through via (PTV) locations, interposer wirings, and signal pin order. It is confirmed that more than 2Gbps, HBM Gen 2 data rate, of signal transmission is doable on the interposers designed by the new method by SPICE simulation. It is also demonstrated that the new method reduces the number of necessary conductive layers, providing a low-cost 2.5-D package solution.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"60 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132638702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Santos, R. Prieto, P. Vivet, J. Colonna, P. Coudrain, R. Reis
{"title":"Graphite-based heat spreaders for hotspot mitigation in 3D ICs","authors":"C. Santos, R. Prieto, P. Vivet, J. Colonna, P. Coudrain, R. Reis","doi":"10.1109/3DIC.2015.7334618","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334618","url":null,"abstract":"Heat dissipation is frequently pointed as one of the main challenges in the promising 3D integration technology. The very thin dies required to integrate high density TSVs reduce the heat dissipation capacity of the 3D stack and may provoke exacerbated hotpots. This work investigates the use of graphite-based heat spreaders to mitigate the strong hotspot dissipation issues in advanced 3D ICs. Graphite-based materials present high in-plane thermal conductivity and can be integrated into 3D stacks to compensate the poor heat spreading capacity of the thinned silicon dies. Silicon measurements are used to confirm this is a feasible and effective method for thermal management. Numerical simulations for a variety of circuit, application and integration configurations indicate this is an effective approach for hotspot mitigation in 3D ICs. Results for a memory-on-logic 3D circuit indicate a reduction of up to 40% in the peak temperature.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124613209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Room-temperature bonding mechanism of compliant bump with ultrasonic assist","authors":"K. Iwanabe, T. Asano","doi":"10.1109/3DIC.2015.7334584","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334584","url":null,"abstract":"We discuss bonding mechanism of ultrasonic bonding of cone-shaped bump. Room-temperature microjoining of Au-Au or Cu-Cu bumps in the air ambient has been achieved by using the cone-shaped bumps with ultrasonic assist. We have investigated two characteristics of ultrasonic bonding. We first investigate effect of the application of ultrasonic vibration on magnitude of plastic deformation of the compliant bump. We show that “softening” of the bump takes place under the application of ultrasonic vibration. Secondly, change in crystal texture near the bonded interface was analyzed to clarify how the ultrasonic bonding produce bonded interface at room-temperature. Under application of ultrasonic vibration, recrystallization of grains takes place near the interface to transform to fine crystallites. The thermocompression bonding, on the other hand, generates fine crystals in the bulk of the cone-shaped bump. This difference in location where recrystallization generates can be interpreted by taking shear strain distribution into consideration. The room temperature bonding can be interpreted by the generation of fine crystallites at the interface which results in breaking of a contaminant layer at the interface.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128632153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Velenis, M. Detalle, G. Hellings, M. Scholz, E. Marinissen, G. V. D. Plas, A. L. Manna, Andy Miller, D. Linten, E. Beyne
{"title":"Processing active devices on Si interposer and impact on cost","authors":"D. Velenis, M. Detalle, G. Hellings, M. Scholz, E. Marinissen, G. V. D. Plas, A. L. Manna, Andy Miller, D. Linten, E. Beyne","doi":"10.1109/3DIC.2015.7334620","DOIUrl":"https://doi.org/10.1109/3DIC.2015.7334620","url":null,"abstract":"Enhancing the functionality of interposer substrates by incorporating low-cost active devices is investigated in this paper. Different processing options for the active devices are considered and their impact on processing cost is evaluated. Furthermore, the trade-off between processing complexity and the enabled device functionality is investigated. Two applications for the active devices on the interposer are considered: (i) pre-bond testing of the interposer dies (including TSV interconnects), and (ii) migrate the ESD protection diodes from the active dies to the interposer substrate. The impact of those applications on the system cost of three different interposer-based systems is investigated.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123803267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}