Di Li, Shyh-Horng Yang, C. Machala, Li Lin, A. Tasch, B. Hornung, A. Li-Fatou, S. Banerjee
{"title":"Monte Carlo simulation of consecutive implants into SiO/sub 2/ capped Si","authors":"Di Li, Shyh-Horng Yang, C. Machala, Li Lin, A. Tasch, B. Hornung, A. Li-Fatou, S. Banerjee","doi":"10.1109/SISPAD.2002.1034556","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034556","url":null,"abstract":"The low energy as-implanted profile is very sensitive to the cap oxide layer thickness and PAI conditions. In this work, theoretical and experimental studies have been carried out quantitatively to investigate these dependencies. Using ZBL pair-specific inter-atomic potentials in the Monte Carlo ion implantation simulator, UT-MARLOWE, consecutive implants of PAI and PLDD were simulated and above effects were accurately captured.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"368 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125696542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic order reduction of thermo-electric model for micro-ignition unit","authors":"T. Bechtold, E. Rudnyi, J. Korvink","doi":"10.1109/SISPAD.2002.1034534","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034534","url":null,"abstract":"In this paper we present an automatic, Krylov-subspace-based order reduction of a thermo-electric model, describing a novel type of micropropulsion device. Model order reduction is essential for achieving easily to evaluate, yet accurate macromodel of the device, and Is needed for simulating both the microthruster array and its driving circuitry. We present numerical simulation results of the full finite element model and the reduced order model that describes the transient thermo-electric behavior. A comparison between Krylov-subspace-based order reduction and order reduction using control theoretical approaches, such as Balanced Truncation Approximation (BTA), has been performed. For the first time a Single-Input-Single-Output (SISO) setup for the reduction algorithm was sufficient to approximate the complete time-dependent temperature distribution of the device.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125135340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new gate current model accounting for a non-Maxwellian electron energy distribution function","authors":"A. Gehring, T. Grasser, H. Kosina, S. Selberherr","doi":"10.1109/SISPAD.2002.1034560","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034560","url":null,"abstract":"We report on a new formulation to describe hot electron injection through gate dielectrics. It is based on an expression which accounts for the non-Maxwellian shape of the electron energy distribution function. We use the first three even moments of the Boltzmann equation n, T/sub n/, and /spl beta//sub n/ found by the solution of a six moments transport model to describe the shape of the distribution function. Excellent agreement with results from rigorous Monte Carlo simulations and measurements is achieved.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122576978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Heitzinger, J. Fugger, O. Haberlen, S. Selberherr
{"title":"Simulation and inverse modeling of TEOS deposition processes using a fast level set method","authors":"C. Heitzinger, J. Fugger, O. Haberlen, S. Selberherr","doi":"10.1109/SISPAD.2002.1034549","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034549","url":null,"abstract":"Deposition and etching of silicon trenches is an important manufacturing step for state of the art memory cells. Understanding and simulating the transport of gas species and surface evolution enables to achieve void-less filling of deep trenches, to predict the resulting profiles, and thus to optimize process parameters with respect to manufacturing throughput and the quality of the resulting memory cells. For the simulation of the SiO/sub 2/ deposition process from TEOS (Tetraethoxysilane), the level set method was used in addition to physical models. The level set algorithm devised minimizes computational effort while ensuring high accuracy by intertwining narrow banding and extending the speed function. In order to make the predictions of the simulation more accurate, model parameters were extracted by comparing the step coverages of the deposited layers in the simulation with those of SEM (scanning electron microscope) images.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131719445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multiscale simulation of diffusion, deactivation, and segregation of dopants - ab-initio to continuum","authors":"W. Windl","doi":"10.1109/SISPAD.2002.1034522","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034522","url":null,"abstract":"In this paper, concepts and applications of ab-initio based multiscale process simulation work are discussed, including results for diffusion, deactivation, and interface segregation of boron in silicon as well as a corresponding continuum model.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116966591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Nanoelectronic 3-D (NEMO 3-D) simulation of multimillion atom quantum dot systems","authors":"F. Oyafuso, Gerhard Klimeck, R. Bowen, T. Boykin","doi":"10.1109/SISPAD.2002.1034542","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034542","url":null,"abstract":"The convergence of electron and hole ground states of a dome-shaped In/sub 0.6/Ga/sub 0.4/As quantum dot as a function of the size of the surrounding buffer is explored within an sp/sup 3/d/sup 5/s* tight binding model. It is found that although the quantum dot encompasses only 2 /spl times/ 10/sup 5/ atoms, proper convergence of ground state eigenenergies requires that over 10 times as many atoms need to be included in the simulation domain. It is also found that the disorder-induced broadening is very sensitive to the applied boundary conditions. Examination of local eigenenergies as functions of position shows similar convergence problems and indicates that an inaccurate resolution of the equilibrium atomic positions due to truncation of the simulation domain may be the source of the slow ground state convergence.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120921014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient algorithm for 3D interconnect capacitance extraction considering floating conductors","authors":"O. Cueto, F. Charlet, A. Farcy","doi":"10.1109/SISPAD.2002.1034528","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034528","url":null,"abstract":"With the inclusion of floating conductors in integrated circuits, conventional simulation tools exhibit prohibitive calculation times. A new simulation tool, called ICARE, was developed to extract efficiently the 3D capacitance matrix of interconnect structures embedded in a multi-layered dielectric environment. Using the so-called fictitious domain method, it leads to a coupled linear system, with the potential on a regular 3D grid of a simple-shaped domain, including the dielectric media and the charge on a mesh of the conductor surfaces as unknowns. A specific adaptation of this numerical method is introduced, giving the possibility of taking into account the floating conductors in an efficient way. As a result, realistic structures, consisting of one or two conducting lines surrounded by a great number of floating conductors, are simulated.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117109953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Tsukamoto, T. Kunikiyo, K. Nii, H. Makino, S. Iwade, K. Ishikawa, Y. Inoue
{"title":"Realistic scaling scenario for sub-100nm embedded SRAM based on 3-dimensional interconnect simulation","authors":"Y. Tsukamoto, T. Kunikiyo, K. Nii, H. Makino, S. Iwade, K. Ishikawa, Y. Inoue","doi":"10.1109/SISPAD.2002.1034517","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034517","url":null,"abstract":"It is still an open problem to elucidate the scaling merit of the embedded SRAM with the Low Operating Power (LOP) MOSFET's fabrication in 50, 70 and 100nm CMOS technology node. Taking into account the realistic SRAM cell layout, we evaluate the parasitic capacitance of Bit Line (BL) as well as Word Line (WL) in each generation. By means of 3-Dimensional (3D) interconnect simulator (Raphael), we focus on the scaling merit through the comparison of the simulated SRAM BL delay in each CMOS technology node. In this paper, we propose two kinds of original interconnect structures which add some modifications to ITRS, and clarify for the first time that the original interconnect structures guarantee the scaling merit of the SRAM cell fabricated with the LOP MOSFET's in 50 70 and 100nm CMOS technology node.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122981891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On density-gradient modeling of tunneling through insulators","authors":"T. Hohr, A. Schenk, A. Wettstein, W. Fichtner","doi":"10.1109/SISPAD.2002.1034571","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034571","url":null,"abstract":"The density gradient model (DG) is tested for its ability to describe tunneling currents through thin insulating barriers. Simulations of single barriers (MOS diodes, MOSFETs) and double barriers show the limitations of the DG model. As a reference the Schrodinger-Bardeen method is taken. 'Resonant tunneling' in the density gradient model turns out to be an artifact related to large density differences in the semiconductor regions.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126065781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wigner transport through tunneling structures scattering interpretation of the potential operator","authors":"M. Nedjalkov, R. Kosik, H. Kosina, S. Selberherr","doi":"10.1109/SISPAD.2002.1034548","DOIUrl":"https://doi.org/10.1109/SISPAD.2002.1034548","url":null,"abstract":"A stochastic method for simulation of quantum transport in nanoscale electronic devices is proposed. The interaction with the Wigner potential is interpreted as a scattering mechanism, which is a counterpart to the scattering mechanisms due to the lattice imperfections. The derived quantum Monte Carlo algorithm retains the basic features of the Single Particle Monte Carlo method used for simulation of classical devices. The method is applied for simulation of tunneling process through energy barriers.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133068997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}