2017 75th Annual Device Research Conference (DRC)最新文献

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Defects in layered vapor-phase grown MOS2 层状气相生长MOS2中的缺陷
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999486
M. Belete, S. Kataria, O. Engström, M. Lemme
{"title":"Defects in layered vapor-phase grown MOS2","authors":"M. Belete, S. Kataria, O. Engström, M. Lemme","doi":"10.1109/DRC.2017.7999486","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999486","url":null,"abstract":"Molybdenum disulfide (MoS2) is a layered two-dimensional (2D) semiconducting material with a band-gap ranging from 1.3 eV in bulk to 1.88 eV in mono-layer [1]. This transition metal dichalcogenide (TMD) is being studied as a potential material for nanoelectronics and optoelectronics [2], [3]. Most of the research on electronic devices based on MoS2 published so far is naturally focused on lateral (in-plane) transport properties. In this work, we investigate MoS2 with respect to its material properties in vertical direction, with a potential application as a dielectric barrier material for vertical heterosturcture devices, such as Graphene-base Hot Electron Transistors (GBTs) [4], [5]. Its low band gap compared to available oxides and its low band offset with respect to silicon (Si) could yield an efficient GBT emission barrier [6]. We discuss Si/MoS2/Metal structures based on C-V measurements and propose the method for probing the electronic properties, including defects and interface states, of MoS2 and other TMDs.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125136611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Quantifying substrate removal induced electrothermal degradation in AlGaN/GaN HEMTs 定量底物去除诱导AlGaN/GaN hemt的电热降解
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999411
M. Tadjer, P. Raad, T. Feygelson, A. Koehler, T. Anderson, L. Ruppalt, A. Nath, B. Pate, K. Hobart, F. Kub
{"title":"Quantifying substrate removal induced electrothermal degradation in AlGaN/GaN HEMTs","authors":"M. Tadjer, P. Raad, T. Feygelson, A. Koehler, T. Anderson, L. Ruppalt, A. Nath, B. Pate, K. Hobart, F. Kub","doi":"10.1109/DRC.2017.7999411","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999411","url":null,"abstract":"Strained heteroepitaxial HEMTs without the mechanical support of a substrate have been demonstrated only for small-sized AlGaN/GaN membranes, i.e., the substrate was removed from within the immediate vicinity of the transistor area [1]. Such transistors have exhibited improved breakdown voltage and frequency response. However, wafer-scale substrate removal has been considered detrimental to the heterostructure integrity [2]. In this work, by means of a wet-etch removal of the Si substrate over a large circular area (>5 mm diameter) underneath samples with conventionally-processed AlGaN/GaN HEMTs, we demonstrate HEMT operation on large-area AlGaN/GaN membranes and quantify aspects of device performance that were most affected by the substrate removal process.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127643581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Black phosphorus field-effect transistor with record drain current exceeding 1 A/mm 黑磷场效应晶体管,记录漏极电流超过1 A/mm
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999395
M. Si, Lingming Yang, Yuchen Du, P. Ye
{"title":"Black phosphorus field-effect transistor with record drain current exceeding 1 A/mm","authors":"M. Si, Lingming Yang, Yuchen Du, P. Ye","doi":"10.1109/DRC.2017.7999395","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999395","url":null,"abstract":"Two-dimensional (2D) semiconductor, such as transition metal dichalcogenides (TMDs) and black phosphorus (BP), have been extensively studied for future transistor applications because of the atomic thin layered structure for excellent immunity to short channel effects. BP has been considered to be promising for future p-type channel material, because of its high hole mobility, up to 5000 cm2/Vs at room temperature demonstrated [1-6]. However, the on-current (ION) of transistors made of 2D semiconductors as channel materials haven't been demonstrated to be comparable to silicon metal-oxide-semiconductor field-effect transistor (MOSFETs).","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127665413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Dimensionality matters: Electronic transport in 2D layered materials 维度问题:二维层状材料中的电子输运
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999390
J. Appenzeller
{"title":"Dimensionality matters: Electronic transport in 2D layered materials","authors":"J. Appenzeller","doi":"10.1109/DRC.2017.7999390","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999390","url":null,"abstract":"It seems to be unavoidable that the first question that anyone asks when a new material is introduced fo electronic device applications is: “What mobility does this material have?” In fact, this question can be rather misleading, like in the context of graphene, where the absence of a bandgap immediately prohibits its use for transistor applications despite its outstanding mobility values. In addition, quoting mobilities without specifying the actual body thickness of the material under investigation can also easily result in a misinterpretation. It has long been known for example that the mobility of silicon rapidly degrades once its thickness reaches about 10nm For sub-1nm body thicknesses any three-dimensional 3D crystal becomes simply non-conducting. With this in mind, recently reported transport data on two-dimensional (2D) semiconducting materials as transition meta dichalcogenides (TMDs) and black phosphorus (BP) with body thicknesses tbody in the nm-range become quit impressive, even if their mobilities cannot rival graphene.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124352928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Realizing P-FETs and photodiodes on MoS2 through area-selective p-doping via vacancy engineering 利用空位工程在二硫化钼上通过区域选择性p掺杂实现p场效应管和光电二极管
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999418
Shubhadeep Bhattacharjee, K. L. Ganapathi, N. Bhat
{"title":"Realizing P-FETs and photodiodes on MoS2 through area-selective p-doping via vacancy engineering","authors":"Shubhadeep Bhattacharjee, K. L. Ganapathi, N. Bhat","doi":"10.1109/DRC.2017.7999418","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999418","url":null,"abstract":"Air-stable and area-selective doping strategies have eluded 2D materials and thus been a major bottleneck in realizing the plethora of semiconductor devices which require an built in electric field accessible from a p/n junction. Here, we demonstrate the possibility of p-doping through Vacancy Engineering, which unlike previous reports of molecular/substitutional doping is both area/dopant controllable and air-stable. Through Ar<sup>+</sup> ions of appropriate energy and fluence bombarded on exfoliated MoS<inf>2</inf>, we demonstrate creation of sulfur vacancies that vary the S:Mo stoichiometry from 1.94 to 0.97 and hence controllably introduce p-type doping as verified using in-situ XPS and ex-situ Raman/PL measurements. FETs fabricated on Ar<sup>+</sup> bombarded flakes show complete flip in polarity of carrier type from n-type to p-type when compared to Reference samples with the same metal contacts. Furthermore, selective Ar<sup>+</sup> Bombardment only on contacts region shows effective hole injection with I<inf>on</inf>/I<inf>off</inf>>10<sup>3</sup>. Finally p/n junctions with Ar<sup>+</sup> bombardment performed on one half of the flake demonstrate high rectification ratio (>10<sup>4</sup>), forward currents (∼0.6 mA/cm<sup>2</sup>) and excellent photoresponse (I<inf>light</inf>/I<inf>dark</inf> ∼10<sup>3</sup>) and responsivity (100–400 μA/W).","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115330960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A random number generator based on insulator-to-metal electronic phase transitions 基于绝缘体-金属电子相变的随机数发生器
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999423
M. Jerry, A. Parihar, A. Raychowdhury, S. Datta
{"title":"A random number generator based on insulator-to-metal electronic phase transitions","authors":"M. Jerry, A. Parihar, A. Raychowdhury, S. Datta","doi":"10.1109/DRC.2017.7999423","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999423","url":null,"abstract":"Random number generators (RNG) are a fundamental hardware component in modern cryptographic systems [1]. The generation of random numbers can be subdivided into two classes, pseudo-RNGs and hardware RNGs. In pseudo-RNGs software algorithms are implemented on deterministic hardware but are dependent on a set of initial values or “seed”, which reduces the security. In contrast, hardware RNGs generate random numbers from a naturally occurring physical phenomenon, such as thermal noise. However, implementations often suffer from large silicon footprints due to the need to create resistor-amplifier-ADC chains [2] or bias removal circuits [3]. In this work, we experimentally demonstrate a compact and scalable 1T1R based RNG by harnessing the inherent stochasticity in the insulator-to-metal phase transition (IMT) in vanadium dioxide (VO2).","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124884527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Small-signal characteristics of graded AlGaN channel PolFETs 梯度AlGaN通道极化场效应管的小信号特性
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999409
S. Bajaj, Zhichao Yang, F. Akyol, P. Park, Yuewei Zhang, S. H. Sohel, S. Krishnamoorthy, D. Meyer, S. Rajan
{"title":"Small-signal characteristics of graded AlGaN channel PolFETs","authors":"S. Bajaj, Zhichao Yang, F. Akyol, P. Park, Yuewei Zhang, S. H. Sohel, S. Krishnamoorthy, D. Meyer, S. Rajan","doi":"10.1109/DRC.2017.7999409","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999409","url":null,"abstract":"We present small-signal measurements on graded AlGaN channel polarization-doped field-effect transistors (PolFETs) that show constant current gain cutoff frequency, fT, and power gain cutoff frequency, fmax, profiles as a function of current density or gate bias. AlGaN/GaN high electron mobility transistors (HEMTs) are suitable candidates for mm-wave and THz amplifiers. However their transconductance, current gain and power gain profiles reach a peak value at low current density, and then drop off significantly as the current density is increased. Reduction in power gain with gate voltage is detrimental for linearity under large signal operation, and translates into intermodulation distortion.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133179089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
1 kV field plated in-situ oxide, GaN interlayer based vertical trench MOSFET (OG-FET) 1kv原位氧化场镀氮化镓层间基垂直沟槽MOSFET (OG-FET)
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999410
C. Gupta, Anchal Agarwal, Silvia H. Chan, Onur S. Koksaldi, S. Keller, U. Mishra
{"title":"1 kV field plated in-situ oxide, GaN interlayer based vertical trench MOSFET (OG-FET)","authors":"C. Gupta, Anchal Agarwal, Silvia H. Chan, Onur S. Koksaldi, S. Keller, U. Mishra","doi":"10.1109/DRC.2017.7999410","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999410","url":null,"abstract":"In recent years, GaN trench MOSFETs have been actively investigated to achieve low on-resistance and high breakdown voltage [1-8]. The absence of a JFET region makes the trench MOSFET a favorable device structure to reduce the on-resistance. However, poor (electron) channel mobility in GaN trench MOSFETs lead to increased channel resistance. This could potentially result in reliability issues and/or high on-resistance as a large gate bias is needed to reduce the channel resistance. In our previous works, we demonstrated a novel device design (OG-FET), where enhanced channel mobility was obtained by inserting a MOCVD-regrown GaN interlayer between the trenched structure and the in-situ gate dielectric [7, 8]. The breakdown performance of OG-FETs reported in previous work was limited due to the absence of edge termination [8]. In this work, OG-FETs were fabricated with field plate based edge termination which resulted in an enhanced breakdown from 600 V (EBR ∼ 1.5 MV/cm) to 1000 V (EBR ∼ 2 MV/cm).","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130340803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Scaling is over — What now? 缩放结束了-现在怎么办?
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999480
W. Haensch
{"title":"Scaling is over — What now?","authors":"W. Haensch","doi":"10.1109/DRC.2017.7999480","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999480","url":null,"abstract":"Over the last half century, the device community was guided by two quintessential laws that set the roadmap for device work: (1) Moore's law that provided the commercial push to double device count in a cadence of approximately two years and (2) Dennard's scaling laws that provided the physics to do just that. These driving forces slowing down due to power constraints. In fact, the clock frequency did not change significantly since the 65nm node. However, the basic underlying van Neumann architecture, shown in Fig 1, that binds the compute unit with the memory has not changed since its conception in the late 1940s. It served well as general computing platform for the traditional workloads like transaction processing, data bases, etc. However as more and more data is collected and the desire to extract value from this data is growing, a class of workloads is emerging that is ill fitted to run on von Neumann machines. These so called cognitive workloads will handle massive amounts (10s of PB) of data compared to 100GB in traditional workloads. They do not require the same digital accuracy and are more noise tolerant. These relaxed requirements allow to create accelerator chips at improved compute efficiency compared to the general-purpose CPU [1], however within the context of the von Neumann architecture. Neuromorphic computing solutions will eliminate the von Neumann bottleneck by reducing data movement in the system.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123268077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Graphene-based ion-sensitive field effect transistor 石墨烯基离子敏感场效应晶体管
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-01 DOI: 10.1109/DRC.2017.7999422
Hongmei Li, Md. Sayful Islam, G. Koley
{"title":"Graphene-based ion-sensitive field effect transistor","authors":"Hongmei Li, Md. Sayful Islam, G. Koley","doi":"10.1109/DRC.2017.7999422","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999422","url":null,"abstract":"Graphene has drawn a huge research interest in chemical and biological sensor applications, since its first discovery in 2004, primarily due to its high surface to volume ratio, high carrier mobility and unsaturated sp2 bonds at the surface. Although many different graphene-based chemical sensors have been reported, its application in biological sensors is quite limited so far. Nonetheless, graphene-based field effect transistors (FETs) offer an excellent platform to develop biological sensors capable of performing detection of bio-analytes in liquid media, including sensing various types of ions with applications in drug discovery and cell efflux research. Particularly potassium ion sensing is important for prediction of the onset of heart attack and epilepsy. In this work, we propose a graphene-based top-gated field effect transistor on two different substrates, with an ion-selective membrane coating on the graphene, to realize a highly sensitive and selective K+ ion sensor.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114932490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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