2017 75th Annual Device Research Conference (DRC)最新文献

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Machine learning for variability aware statistical device design: The case of perpendicular spin-transfer-torque random access memory 可变性感知统计器件设计的机器学习:垂直自旋-传递-扭矩随机存取存储器的案例
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999435
Urmimala Roy, T. Pramanik, Subhendu Roy, L. F. Register, S. Banerjee
{"title":"Machine learning for variability aware statistical device design: The case of perpendicular spin-transfer-torque random access memory","authors":"Urmimala Roy, T. Pramanik, Subhendu Roy, L. F. Register, S. Banerjee","doi":"10.1109/DRC.2017.7999435","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999435","url":null,"abstract":"Spin-transfer-torque random access memory (STT RAM) is a promising memory technology due to its scalability, endurance and non-volatility. Addressing the process induced variations during realistic device fabrication process is a challenge, while trying to meet performance specifications, more so with the technology scaling leading to smaller device dimensions. In a simplified picture, the performance parameters of an STT RAM cell such as switching current density for a given pulse length or the switching delay for a given applied current density, depend on a variety of material parameters such as magnetic anisotropy and damping constant of the “free layer” (FL), the information storage layer. Besides material parameters, device dimensions, such as the diameter and the thickness of FL also vary about the target values, due to imperfections during thin-film deposition, lithography and ion-beam etching, among other process steps. To consider process variations in such parameters, Monte-Carlo simulations can be used, where each of the parameters can be, e.g., a random number from a Gaussian distribution about its target value. However, a modest number of 5 parameters and 100 values for each of them would require (102)5 = 1010 device simulations, and would be computationally infeasible for e.g., micromagnetic simulation. A possible route to circumvent such a prohibitively large computational load would be to use a compact model [1, 2]. However, a method like this relies on the so-called macrospin approximation and assumes spins across FL to be parallel to each other at all times during switching and might not be a true representation. Also, for many emerging devices, a compact model still is not available. Machine learning (ML) has been used in the past to model array of resistive random access memory (RRAM) [3]. In this work, we propose an ML driven simulation methodology to take the effect of process variation into account using micromagnetic simulations with reasonable computational effort. We employ support vector regression (SVR), a method used in supervised learning to anticipate the behavior of a system based on previously obtained “training data”, to predict performance of an STT RAM cell. We use STT RAM as a model system, although the proposed scheme should be usable for other devices too.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"225 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114157599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High temporal & spatial resolution imaging of catastrophic & soft breakdown in self-assembled nanodielectrics (SANDs) films 自组装纳米电介质(SANDs)薄膜中灾难性和软击穿的高时空分辨率成像
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999461
Amr M. S. Mohammed, K. Maize, Katie Stallings, T. Marks, D. Clarke, P. Bermel, M. Alam, A. Shakouri
{"title":"High temporal & spatial resolution imaging of catastrophic & soft breakdown in self-assembled nanodielectrics (SANDs) films","authors":"Amr M. S. Mohammed, K. Maize, Katie Stallings, T. Marks, D. Clarke, P. Bermel, M. Alam, A. Shakouri","doi":"10.1109/DRC.2017.7999461","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999461","url":null,"abstract":"Breakdown processes in polymer dielectrics pose a limitation to energy storage and high-power operation of many electronic devices. These processes have been studied for many decades, and a great deal of progress has been made in developing phenomenological models [1]. Nonetheless, many open questions remain, particularly regarding the development of a single, unified theory to describe all stages of the breakdown process, from initiation, to sub-critical filament advance, to catastrophic breakdown and/or “soft breakdown” [2]. To develop and validate such a detailed understanding, it is essential to first develop high-speed, spatially-resolved in situ characterization techniques. Here we demonstrate that thermoreflectance imaging [3-5] can provide such a capability for voltage stress-induced defects in self-assembled polymer nanodielectrics (SANDs) films [6]. Temporal evolution of self-heating and material blister formation for soft and catastrophic failure sites in SANDs films are imaged at submicron spatial resolution. This result shows that thermoreflectance characterization techniques provide insight into the breakdown processes determining polymer dielectric performance and reliability.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130126575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Contact engineering of monolayer CVD MOS2 transistors 单层CVD MOS2晶体管的接触工程
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999404
A. Alharbi, D. Shahrjerdi
{"title":"Contact engineering of monolayer CVD MOS2 transistors","authors":"A. Alharbi, D. Shahrjerdi","doi":"10.1109/DRC.2017.7999404","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999404","url":null,"abstract":"Transition metal dichalcogenides (TMDs) are promising for next-generation electronic and optoelectronic device applications. However, the development of a viable TMD device technology requires an effective strategy for making low-resistance contacts to these materials. In addition, large-area synthesis of low-defect TMD crystals is essential for transforming basic device studies into commercial products. Here, we show large-area synthesis of monolayer (ML) MoS<inf>2</inf> using chemical vapor deposition (CVD) with electron mobility of ∼64cm<sup>2</sup>/V.s at room temperature. We performed contact engineering through a combination of work function engineering and effective n-type doping of MoS<inf>2</inf> using engineered sub-stoichiometric HfO<inf>x</inf>. Our results indicate significant reduction of the contact resistance to ∼480Ω.μm without degrading key transistor properties such as subthreshold swing (∼125mV/dec), mobility (∼64cm<sup>2</sup>/V.s), and I<inf>ON</inf>/I<inf>OFF</inf> ratio (>10<sup>6</sup>).","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132511260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Band-to-band tunneling limited ambipolar current in black phosphorus MOSFETs 黑磷mosfet的带间隧道限制双极电流
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999417
M. C. Robbins, N. Haratipour, S. Koester
{"title":"Band-to-band tunneling limited ambipolar current in black phosphorus MOSFETs","authors":"M. C. Robbins, N. Haratipour, S. Koester","doi":"10.1109/DRC.2017.7999417","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999417","url":null,"abstract":"Black phosphorus (BP) has emerged as a promising channel material for highly scaled transistors with a high mobility (1000 cm2/Vs), tunable band gap (0.3 eV–2.0 eV), and anisotropic effective mass [1]-[4] at ultra-thin body thicknesses. While devices with high performance in the ON-state have been demonstrated by using Schottky contacts, the subthreshold characteristics have been poor [5],[6]. This is caused by large ambipolar carrier injection from the drain due to the relatively small, direct band gap of BP and a low effective mass. Recently, it has been shown that using electrostatically doped (ES-doped) source and drain contacts can improve the subthreshold characteristics in BP MOSFETs [7], however, the potential advantage of this approach was not well quantified. In this work, we directly compare BP MOSFETs with ES-doped and Schottky contacts, and show greatly improved subthreshold and off-state leakage behavior in ES-doped devices, particularly at high drain bias. Using a one-dimensional transport model, we further show that the advantage of the ES-doped devices is due to the ambipolar current being limited by band-to-band tunneling. Experimentally exploring BTB-tunneling in BP is a first step towards developing BP TFETs.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121185366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Generation of hot electrons in GaN HEMTs under RF Class A and AB PAs 射频A类和AB类PAs下GaN hemt中热电子的产生
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999436
A. Latorre-Rey, J. Albrecht, M. Saraniti
{"title":"Generation of hot electrons in GaN HEMTs under RF Class A and AB PAs","authors":"A. Latorre-Rey, J. Albrecht, M. Saraniti","doi":"10.1109/DRC.2017.7999436","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999436","url":null,"abstract":"AlGaN/GaN HEMTs have demonstrated outstanding performance in terms of high-power and high frequency operation. However, reliability concerns constitute one of the limiting factors preventing the fully exploitation of this technology. In particular, hot electron generation has been consistently reported as one of the main mechanisms for device degradation, since high energy carriers can create electrically active traps that reduce performance [1]. Many studies of hot electron concentration have been performed on DC operation only, and those done in RF do not provide an accurate, quantitative carrier energy distribution [2]. In this work, we present a comparative study of the hot carrier generation under RF operation in Class A and Class AB power amplifier (PA) topologies. This is done in terms of the accurate simulation of the electron energy distribution function (EDF) under RF conditions, by means of our full band cellular Monte Carlo device simulator (CMC) [3], self-consistently coupled to a harmonic balance (HB) circuit solver based on the load line technique [4]. Within this framework it can be simultaneously captured the highly-non-linear, out of equilibrium carrier dynamics of the device under large signal operation, along with the full complexity of the external circuitry necessary for adequate power amplifier performance.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127877107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
E-mode RF transistors and circuit model using CVD MoS2 e模射频晶体管和电路模型采用CVD MoS2
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999403
A. Sanne, M. Yogeesh, S. Park, R. Ghosh, C. Liu, L. Mathew, R. Rao, D. Akinwande, S. Banerjee
{"title":"E-mode RF transistors and circuit model using CVD MoS2","authors":"A. Sanne, M. Yogeesh, S. Park, R. Ghosh, C. Liu, L. Mathew, R. Rao, D. Akinwande, S. Banerjee","doi":"10.1109/DRC.2017.7999403","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999403","url":null,"abstract":"Molybdenum disulfide (MoS<inf>2</inf>), a member of the transition metal dichalcogenide (TMD) family, is a 2D semiconductor with a direct bandgap of ∼1.8 eV for single layers. Its bandgap allows for high I<inf>on</inf>/I<inf>off</inf> metal-oxide semiconducting field-effect transistors (FETs). More relevant for radio frequency (RF) wireless applications, theoretical studies predict MoS<inf>2</inf> to have saturation velocities, V<inf>sat</inf> > 3×10<sup>6</sup> cm/s. Recent studies have increased exfoliated MoS<inf>2</inf> cutoff frequencies by employing a combination of scaling and geometry modification.<sup>1</sup> However, for industrial scale applications, the mechanical cleavage process is not scalable and, thus far, there have been few studies on chemical vapor deposited (CVD) MoS<inf>2</inf> RF FETs.<sup>2,3</sup> Here we take an embedded gate approach<sup>4</sup> to yield record transconductance, cutoff frequencies, and current saturation in CVD MoS<inf>2</inf>. Using measured S-parameters and the MIT-MVS semi-empirical verilog-A model<sup>4</sup> we demonstrate analog and mixed-signal circuit operation.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129170453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Gate structure engineering for enhancement-mode AlGaN/GaN MOSHEMT 增强模式AlGaN/GaN MOSHEMT的栅极结构工程
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-08-01 DOI: 10.1109/DRC.2017.7999446
Han-Yin Liu, Ching-Sung Lee, Chih-Wei Lin, M. Chiang, W. Hsu
{"title":"Gate structure engineering for enhancement-mode AlGaN/GaN MOSHEMT","authors":"Han-Yin Liu, Ching-Sung Lee, Chih-Wei Lin, M. Chiang, W. Hsu","doi":"10.1109/DRC.2017.7999446","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999446","url":null,"abstract":"Enhancement-mode AlGaN/GaN MOSHEMTs have been widely used in power electronic applications thanks to its superior electrical characteristics [1, 2]. Several methods have been proposed to fabricate E-mode AlGaN/GaN HEMTs like gate recess [3], F− doping at the AlGaN barrier layer [4], and p-type GaN cap layer [5]. Nevertheless, the high threshold voltage and high output current is hard to obtain simultaneously for the E-mode AlGaN/GaN HEMT. Recently, the E-mode AlGaN/GaN MOSHEMT is realized by integrating two of the above methods to obtain higher Ids and more positive Vt [6, 7]. This work proposes gate structure engineering by integrating three processes, including gate recess, fluorine doped barrier layer and in-situ chlorine doped Al2O3 gate dielectric layer to realize the E-mode AlGaN/GaN MOSHEMT. The present MOSHEMT shows higher output current density and more positive threshold voltage than the MOSHEMTs which use gate recess and fluorine doping techniques.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131344639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Scaling of 4H-SiC p-i-n photodiodes for high temperature applications 高温应用中4H-SiC p-i-n光电二极管的缩放
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-25 DOI: 10.1109/DRC.2017.7999445
Shuoben Hou, P. Hellström, C. Zetterling, M. Östling
{"title":"Scaling of 4H-SiC p-i-n photodiodes for high temperature applications","authors":"Shuoben Hou, P. Hellström, C. Zetterling, M. Östling","doi":"10.1109/DRC.2017.7999445","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999445","url":null,"abstract":"Ultraviolet (UV) detection is important in astronomy, combustion detections and medical analysis. Solid-state UV detectors based on wide band gap semiconductors, such as 4H-SiC, are widely studied because of their excellent electrical properties [1]. 4H-SiC based UV detectors are solar blind and can be applied in extremely high temperature environments [2]. However, the state-of-art 4H-SiC photodetectors still have large sizes (>10000 μm2), which are not suitable to be integrated into high resolution UV photography sensors. To build a full-frame UV imaging sensor containing megapixels, photodiodes smaller than 20 μm by side are necessary. Here, we report the fabrication and characterization of 4H-SiC p-i-n photodiodes with mesa areas scaled from 40000 μm2 to 400 μm2. The relationships between the parameters and the areas of the photodiodes are discussed. The photodiodes are fully functional from room temperature (RT) to 500 °C.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123068850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
First demonstration of band-to-band tunneling in black phosphorus 黑磷带对带隧道的首次演示
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-25 DOI: 10.1109/DRC.2017.7999394
Peng Wu, A. Prakash, J. Appenzeller
{"title":"First demonstration of band-to-band tunneling in black phosphorus","authors":"Peng Wu, A. Prakash, J. Appenzeller","doi":"10.1109/DRC.2017.7999394","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999394","url":null,"abstract":"Black phosphorus (BP) has recently attracted wide interest for various applications and is particularly appealing for low power tunneling devices due to several unique properties such as a small bandgap and small carrier effective masses. Here, we report the first experimental demonstration of band-to-band tunneling (BTBT) in BP. In addition, we also report fully top gated BP FETs with record-high n-type current drive capabilities.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127162327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Graphene field effect transistors with optimized contact resistance for current gain 石墨烯场效应晶体管与优化的接触电阻电流增益
2017 75th Annual Device Research Conference (DRC) Pub Date : 2017-06-25 DOI: 10.1109/DRC.2017.7999420
W. Wei, D. D. Fazio, U. Sassi, A. Ferrari, E. Pallecchi, H. Happy
{"title":"Graphene field effect transistors with optimized contact resistance for current gain","authors":"W. Wei, D. D. Fazio, U. Sassi, A. Ferrari, E. Pallecchi, H. Happy","doi":"10.1109/DRC.2017.7999420","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999420","url":null,"abstract":"Graphene is a promising two dimensional channel material for radio frequency field effect transistors (RF-FET)[1]. It has ambipolar carriers with high mobility and high saturation velocity. It also has excellent mechanical robustness and flexibility. Due to these intrinsic properties, graphene based FETs can be applied to flexible, wearable components for RF applications such as high speed wireless communication. GFETs fabricated on rigid and flexible substrate have been demonstrated by several groups [2-4]. Nevertheless, the high metal-to-graphene contact resistance remains a bottleneck factor for RF performance. i.e, current gain cut-off frequency, ft. In this work, we report a process and full characterization of GFETs based on CVD graphene on Si/SiO2 substrate. A low contact resistance (Rc) of 125 ohm·μm with high reliability was obtained by using pure Au. From the measurement of scattering parameters, we extracted the high frequency performances of our GFETs. Best intrinsic transit frequency have been observed for transistor with 180 nm channel length, with intrinsic ft of 100 GHz at low bias of 0.5V.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121911750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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