2017 75th Annual Device Research Conference (DRC)最新文献

{"title":"2D-EFET — A novel beyond Boltzmann transistor","authors":"Saptarshi Das","doi":"10.1109/DRC.2017.7999476","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999476","url":null,"abstract":"The unprecedented technological success of the electronics industry over the last five decades have been driven by Silicon (Si) technology at the center of which resides the metal oxide semiconductor field effect transistor (MOSFET). Relentless scaling of MOSFET dimensions ensured faster and cheaper computing since more and more transistor could be packed into the same chip area.1 At the same time scaling of supply voltage (VDD) kept the power density practically constant. This golden era of MOSFET scaling often referred to as the Dennard Scaling era had continued for almost three decades. However, around 2005, the voltage scaling ended owing to the fact that further reduction in supply voltage (VDD) resulted in exponential increase in the OFF state current (IOFF) and hence the static power dissipation of the MOSFET. This was a direct consequence of non-scalability of the subthreshold slope (SS) to below 60mV/decade. Note, subthreshold slope is defined as the amount of gate voltage required to change the source to drain current of a MOSFET by one order of magnitude. The non-scalability of SS is the outcome of Boltzmann statistics, the governing physical principle for top of the barrier devices like MOSFETs. Although voltage scaling stopped, length scaling still continued for another decade albeit with new challenges like increasing power density, short channel effects and increasing parasitic. Unfortunately, even for the most advanced FinFET technology length scaling seems extremely challenging. Therefore, it is imminent that both aspects of MOSFET scaling will end very shortly. In order to sustain the growth of the semiconductor industry, it is necessary that novel low power beyond Boltzmann device concepts based on aggressively scalable materials be conceived immediately.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124014659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Negative capacitance transients in metal-ferroelectric Hf0.5Zr0.5O2-Insulator-Semiconductor (MFIS) capacitors","authors":"P. Sharma, J. Zhang, A. Saha, S. Gupta, S. Datta","doi":"10.1109/DRC.2017.7999477","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999477","url":null,"abstract":"The subthreshold swing (SS) in MOSFETs is limited to 60 mV/dec change in drain current at room temperature by the Boltzmanr distribution of carriers, thus limiting its operating voltage (VD>SS×log Ion/IOFF). Ferroelectric FETs can achieve sub-60 mV/dec by harnessing the negative capacitance (NC) effect in a Ferroelectric (FE) material, thus enabling low voltage operation [1]. Previous works have reported the direct observation of NC transients in Metal-FE-Metal (MFM) capacitors using epitaxial and polycrystalline ferroelectrics that are directly grown on metal electrodes [2][3][4]. For transistor application, however, FE directly grown on silicon channel with an interfacial oxide layer, such as the Metal-FE-Insulator-Semiconductor (MFIS), represent a more practica] configuration. In this paper, we report on the observation of negative capacitance transient for the first time in the Hafnium Zirconium oxide MFIS capacitor connected in series with a load resistor. We perform systematic experiments to study the influence of series resistance, applied AC voltage amplitude and the role of partial dipole switching on the NC effect.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125340600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"MoS2 negative capacitance FETs with CMOS-compatible hafnium zirconium oxide","authors":"Felicia A. McGuire, Yuh-Chen Lin, B. Rayner, A. Franklin","doi":"10.1109/DRC.2017.7999478","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999478","url":null,"abstract":"The attractiveness of negative capacitance field-effect transistors (NC-FETs) stems from their ability to enable a subthreshold swing (SS) below the 60 mV/decade thermal limit at room temperature — a direct effect of the step-up voltage amplifier behavior of the ferroelectric [1]. This effect has been shown to yield sub-60 mV/dec SS in several Si-based NC-FETs [2-4]; however, as Si-based devices become increasingly difficult to scale, it is pertinent to explore alternative materials for NC-FETs that offer scalability in voltage as well as size [5]. One promising alternative channel material is the 2D transition metal dichalcogenide (TMD, such as MoS2), which offer sub-nm thinness and a more stable channel capacitance that, when coupled with the NC-effect, could produce steep switching over a broad range of current. To date, the only demonstration of an NC-FET with a 2D channel used a polymeric ferroelectric, resulting in a lack of stability and CMOS-compatibility despite superb low-voltage switching [6]. In this work, we demonstrate 2D NC-FETs using MoS2 with CMOS-compatible hafnium zirconium oxide (HfZrO2 or HZO) as the ferroelectric to achieve repeatable and sustained sub-60 mV/dec switching.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"230 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124541398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Integration of InGaAs/InP structure above ROIC-CMOS for SWIR imaging","authors":"Florian Le Goff, D. Mathiot, J. Decobert, Jean-Pierre Le Goec, O. Parillaud, J. Reverchon","doi":"10.1109/DRC.2017.7999458","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999458","url":null,"abstract":"Nowadays short wavelength infrared (SWIR) imaging based on InP/InGaAs photo-diodes is quite popular for uncooled camera. The state of the art technology is a double layer planar heterointerface focal plane array [1]. But, it remains expensive and only used for defense and scientific applications. Its cost comes essentially from the individually hybridization of photo-diodes array with read-out circuit, by the mean of an indium-bumps flip-chip process. We suggest an alternative method for hybridization, in order to lowering the cost and providing a sustainable process to decrease the pixel pitch, and also increase the possible format. It consists in a direct integration of InP/InGaAs/InP structure above a finished read-out circuit (with CMOS technology) and circular diode architecture.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127399763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Three-dimensional plasmonic light concentrators for efficient terahertz generation","authors":"N. Yardimci, S. Cakmakyapan, Soroosh Hemmati, M. Jarrahi","doi":"10.1109/DRC.2017.7999516","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999516","url":null,"abstract":"Photoconductive antennas are extensively used in time-domain terahertz imaging and spectroscopy systems to generate terahertz radiation [1, 2]. These emitters consist of a terahertz antenna fabricated on a photoconductive semiconductor. When the semiconductor is pumped by a femtosecond laser and a bias voltage is applied to the antenna arms, an ultrafast photocurrent is generated. As this photocurrent drives the antenna, a pulsed terahertz radiation is generated. However, only the carriers that drift to the antenna arms in a sub-picosecond time scale can efficiently contribute to the generation of terahertz radiation. The rest of the photocarriers, namely the slow photocarriers, cause extra thermal dissipation and degrade device reliability. To improve device reliability, short carrier lifetime semiconductors are often used, which recombine the slow carriers and prevent early thermal breakdown. However, short carrier lifetime semiconductors cannot offer high carrier drift velocities. Therefore, the radiation efficiency of photoconductive emitters fabricated on short carrier lifetime substrates is limited. In this work, we present a highly reliable and efficient photoconductive terahertz emitter that circumvents the use of short carrier lifetime substrates by utilizing three-dimensional plasmonic light concentrators.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123082030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Black phosphorus avalanche photodetector","authors":"M. Atalla, S. Koester","doi":"10.1109/DRC.2017.7999500","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999500","url":null,"abstract":"The strong light-matter interaction of atomically-thin layered black phosphorus (BP) has attracted great attention recently. Exfoliated few-layer and monolayer BP flakes have a layer-tunable direct bandgap that varies from 2.0 eV for monolayer to 0.3 eV for bulk, which makes BP a very promising optoelectronic material in the visible and telecom wavelengths [1-3]. The high mobility of BP devices suggested its utilization as an active material of an avalanche photodetector (APD). Recently, APDs utilizing two-dimensional (2D) materials such as transition-metal dichalcogenides (e.g. MoS2) and layered III-VI semiconductors (e.g. InSe) have been demonstrated [4,5]. Both of these 2D materials possess wide bandgaps that discourage their usage in the infrared [6,7]. The successful demonstration of waveguide-integrated BP photodetector working at 1.55 μm wavelength [1] has stimulated the pursuit of high-performance BP APDs. In this work, we report on the first 2D material-based BP APD featuring high external quantum efficiency (EQE) and avalanche gain. These results provide strong evidence that BP is a promising material for high-performance optical communication and imaging systems.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121206323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Reconfigurable germanium transistors with low source-drain leakage for secure and energy-efficient doping-free complementary circuits","authors":"J. Trommer, A. Heinzig, S. Slesazeck, U. Mühle, M. Löffler, D. Walter, C. Mayr, T. Mikolajick, W. Weber","doi":"10.1109/DRC.2017.7999426","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999426","url":null,"abstract":"Germanium is a promising material for future VLSI devices, due to its high hole mobility. However, due to the low bandgap of 0.66 eV Ge based devices typically suffer from high reverse junction leakage und therefore high static power dissipation. In this paper, we apply a nanowire structure with multiple independent gates to suppress the leakage in off-direction to achieve off-current levels below 10−9 A/μm. In addition, the polarity of the same doping-free device can be dynamically switched between unipolar p- and n-type function, without the use of any dopants. This feature offers a variety of disrupting circuit design possibilities not accessible with CMOS, for example in the area of hardware security [l].","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121258008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Evolution of photonic integrated circuits","authors":"J. Bowers","doi":"10.1109/DRC.2017.7999388","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999388","url":null,"abstract":"Photonic Integrated Circuits (PICs) are evolving rapidly for applications from interconnects to sensors. We present the evolution of four different platforms for photonic integration: pure III-V/InP, pure SOI (monolithic silicon photonics), III-V heterogeneously integrated on SOI (heterogeneous integration), and III-V epitaxially grown on silicon. Presently, thousands of optical devices are integrated into PICs to achieve multiterabit per second transceivers, LIDARs, and chemical sensors.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114358077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"First demonstration of vertical Ga2O3 MOSFET: Planar structure with a current aperture","authors":"M. Wong, K. Goto, A. Kuramata, S. Yamakoshi, H. Murakami, Y. Kumagai, M. Higashiwaki","doi":"10.1109/DRC.2017.7999413","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999413","url":null,"abstract":"β-Ga<inf>2</inf>O<inf>3</inf> is being actively pursued for power devices owing to its wide bandgap of 4.5 eV and the availability of melt-grown native substrates for high quality epitaxy. Depletion and enhancement mode Ga<inf>2</inf>O<inf>3</inf> metal-oxide-semiconductor field-effect transistors (MOSFETS) reported to date have been implemented as lateral devices. For high voltage and high power ratings, vertical topologies are preferred since chip area utilization is more efficient and device operation is insensitive to surface effects. This paper presents the first experimental demonstration of a vertical Ga<inf>2</inf>O<inf>3</inf> MOSFET, wherein the source was electrically isolated from the drain by a current blocking layer (CBL) except at an aperture opening through which drain current (I<inf>DS</inf>) was conducted [1]. Modulation of I<inf>DS</inf> was effected by gating a channel above the CBL. Similar to Si and SiC technologies, this planar device structure was fabricated with no regrowth steps. The buried CBL, which acted as a back barrier for the channel, was formed by Mg-ion (Mg⁺⁺) implantation doping in light of the anticipated deep acceptor nature of Mg in β-Ga<inf>2</inf>O<inf>3</inf>. Despite large source-drain leakage due to an unoptimized CBL, successful transistor action was realized.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114553418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"1965–1975: A miracle decade for DRC","authors":"J. Woodall","doi":"10.1109/DRC.2017.7999469","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999469","url":null,"abstract":"In the early days, the Device Research Conference (DRC) has played a seminal role in the initial announcement of breakthroughs that led to new and improved devices and chips found in today's semiconductor market menu. I will briefly cite personal and collegial examples of compound semiconductor breakthroughs that occurred during what I view as the miracle decade of 1965–1975. I cite this era because during it, the following electronic and photonic devices first appeared either at the DRC or in related journals: the invention development high efficiency, Si doped, IR emitting GaAs LEDs, the first working devices based on the AlGaAs/GaAs heterojunction (HJ), e.g. AlGaAs HBTs, AlGaAs lasers, AlGaAs LEDs, cw AlGaAs lasers, state-of-the-art AlGaAs/GaAs high efficiency solar cells, and semiconductor lift which is used in the current state of the art single junction AlGaAs/GaAs solar cell. All of these were first realized via liquid phase epitaxy (LPE). The impact of these breakthroughs later led to the high electron mobility transistors (HEMTs), GaInP based red and yellow LEDs and GaN based blue-green, blue, UV, and white emitting LEDs, and blue lasers. Along the way the AlGaAs/GaAs HJ and the GaN HJ has produced three Nobel Prizes: the 1998 prize for the quantum Hall Effect to Laughlin, Stormer and Tsui; half of the 2000 HJ prize to Kroemer and Alferov; the 2014 prize for blue LEDs to Akasaki, Amano, and Nakamura. HJ technology has found its way into Si based HBTs using germanium. And there are even reports of quantum wire structures employing HJs! Finally, as a former DRC program committee member, I would like to close with the following observation. The era of breakthrough device results that are likely to have a high impact is probably behind us. In its place is the ongoing search for innovations in wires and new 2-D materials and films, i.e fishing trips. This is currently mostly in the realm of materials science and engineering. With this in mind I encourage the current program committees to lower the bar and seek out early, provisional, and possibly interesting device results in this new era with the understanding that they may not be of lasting importance.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127465447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}