2017 75th Annual Device Research Conference (DRC)最新文献

{"title":"Enhancing breakdown voltage in amorphous zinc tin oxide Schottky diode","authors":"Y. Son, R. L. Peterson","doi":"10.1109/DRC.2017.7999460","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999460","url":null,"abstract":"Amorphous oxide semiconductors (AOS) have superior charge carrier mobility compared to amorphous silicon and organic semiconductors. Due to their large-area uniformity and transparency, AOS has been widely pursued for switching thin-film transistors (TFTs) for backplane display pixels [1]. From the success of flat-panel displays, these materials are now being investigated for large area electronics such as solar cell and imagers, which require not only low-cost fabrication methods like solution process, but also low-cost materials. Most AOS contain indium, which is expensive due to its high demand in ITO. Amorphous zinc tin oxide (a-ZTO) is thus an attractive alternative [2]. Compared to TFTs, AOS Schottky diode has been only recently investigated for use in applications such as energy harvesters and wireless communications [3-5]. We have previously demonstrated AOS Schottky diodes made with solution-processed a-ZTO having high forward current density exceeding 103A·cm−2 at 1V, a rectification ratio of > 102, and ideality factor of ∼1.9 [6]. In this work we investigate, for the first time, the breakdown mechanisms of AOS diodes. We observe forming-type behavior in the amorphous oxides, which we attribute to conductive filaments of oxygen vacancies, that can lead to premature breakdown of the devices.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128636059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Partial switching of ferroelectrics for synaptic weight storage","authors":"Erich W Kinder, C. Alessandri, P. Pandey, G. Karbasian, S. Salahuddin, A. Seabaugh","doi":"10.1109/DRC.2017.7999427","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999427","url":null,"abstract":"Gokmen and Vlasov proposed that the training of deep neural networks would be dramatically accelerated by the realization of resistive processing units that can store analog weights to minimize data movement during training [1]. Here we measure and evaluate the partial switching of the ferroelectric (FE) PbZrTiO3 (PZT) and, for the first time, Hf0 8Zr0 2O2, (HZO), formed by atomic layer deposition, for use as a nonvolatile analog memory element. The spontaneous polarization P of a FE can be switched by applying a voltage that exceeds the coercive voltage for switching of the FE. This polarization, when fully switched, can have a value of +P or −P (C/cm2), depending on the polarity of the applied voltage. Ferroelectric memory is typically operated in fully switched +P or −P polarizations, however with short (< 10 μs) pulsed voltages, the FE can be partially switched, i.e. only a fraction of the domains are switched during the pulse duration as shown by Tokumitsu in PZT [2] and indicated in Fig. 1.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126001920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Experimental demonstration of enhanced terahertz coupling to plasmon in ultra-thin membrane AlGaN/GaN HEMT arrays","authors":"H. C. Quispe, Ashish Chanana, J. Encomendero, M. Zhu, A. Nahata, D. Jena, H. Xing, B. Sensale‐Rodriguez","doi":"10.1109/DRC.2017.7999467","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999467","url":null,"abstract":"THz technology offers multiple applications in areas such as remote sensing, spectroscopy, biomedical imaging, and ultra-wide bandwidth communications [1]. However, obtaining high-frequency performance at THz frequencies has proven challenging in conventional electronic devices. This difficulty motivated the exploration of unconventional transport mechanisms such as electron plasma waves. Two dimensional electron gases (2DEGs) in semiconductor heterostructures can allow for collective motion of electrons, i.e. plasma waves, whose group velocity is >10X larger than typical electron drift velocities (i.e. vg >108 cm/s) [2-3]. Devices based on electron plasma waves have attracted significant attention during recent years for THz generation, detection and amplification [4]. In this context, efficient coupling of external THz radiation into and out of plasmons in semiconductor heterostructures is essential for the operation of these devices. A conventional approach to excite plasmons in a 2DEG is via a grating gate coupler as illustrated in Fig. 1(a). In a grating gate configuration, adjacent unit-cells interact with each other making this a coupled resonant system. In contrast, via addition of source (S) and drain (D) electrodes, in a HEMT array configuration as depicted in Fig. 1(b), every unit cell becomes effectively independent. In this configuration, the THz to plasmon coupling is enhanced due to a cooperative effect by synchronizing the electron plasma waves in each unit-cell of the array as theoretically discussed by Popov et al [5]. Here we present the first experimental demonstration of enhanced THz coupling to electron plasma wave or plasmon in ultra-thin membrane HEMT arrays via plasmon synchronization. A thin-membrane configuration enables us to remove substrate effects and further enhance the coupling. The proposed approach allows: (i) more efficient excitation of high order plasmonic modes, and (ii) superior overall coupling-even in configurations having less number of devices per unit area-. Our results reveal a simple way to enhance the THz to plasmon coupling and thus improve the performance of electron plasma wave based devices; this effect can be exploited, for example, to improve the response of HEMT THz detectors.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125201431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors with drain currents exceeding 1.5/1.0 A/mm","authors":"Hong Zhou, P. Ye","doi":"10.1109/DRC.2017.7999443","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999443","url":null,"abstract":"Recently, β-Ga<inf>2</inf>O<inf>3</inf> has shown its great promise for next generation high power device applications due to its ultra-wide bandgap of 4.6–4.9 eV [1]-[5]. Despite the very early development stage, β-Ga<inf>2</inf>O<inf>3</inf> metal-oxide-semiconductor field-effect transistors (MOSFETs) have demonstrated a high blocking voltage of 0.75 kV and a breakdown field of 3.8 MV/cm [2][4]. However, a crucial disadvantage of this material is its low thermal conductivity of 0.1–0.3 W/cm-K. One of the approaches to solve this issue is to introduce a high thermal conductivity substrate with β-Ga<inf>2</inf>O<inf>3</inf> on insulator (GOOI) structure rather than the β-Ga<inf>2</inf>O<inf>3</inf> native substrate. It is questionable whether β-Ga<inf>2</inf>O<inf>3</inf> based FETs can compete with existing GaN or SiC technologies in terms of drain current (I<inf>dmax</inf>) and on-resistance (R<inf>on</inf>). Meanwhile, whether β-Ga<inf>2</inf>O<inf>3</inf> can also be applied in large-signal RF power devices remains to be answered, although β-Ga<inf>2</inf>O<inf>3</inf> suffers from relatively low electron mobility (μ). In this abstract, we have fully explored the device potentials and demonstrated that depletion/enhancement (D/E)-mode GOOI FETs can achieve a record high I<inf>DMAX</inf> of 1.5/1.0 A/mm and high estimated virtual source velocity v=7.3 × 10⁶ cm/s.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131192585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Vertical fin Ga2O3 power field-effect transistors with on/off ratio >109","authors":"Zongyang Hu, K. Nomoto, Wenshen Li, Liheng Zhang, Jae-Hyuck Shin, N. Tanen, Tohru Nakamura, D. Jena, H. Xing","doi":"10.1109/DRC.2017.7999512","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999512","url":null,"abstract":"Recently, Ga<inf>2</inf>O<inf>3</inf> has become an attractive material for both power electronic and optoelectronic device applications since large-size electronic-grade Ga<inf>2</inf>O<inf>3</inf> substrates can be readily produced by melt-grown methods. Furthermore, high quality epitaxy and n-type doping schemes have been demonstrated [1, 2]. Due to its ultra-wide band gap (∼4.5–4.9 eV), Ga<inf>2</inf>O<inf>3</inf> is estimated to have a critical breakdown field >6 MV/cm, comparing favorably with ∼3 MV/cm in SiC and ∼4 MV/cm in GaN. This allows devices capable of handling large switching voltages. Devices such as lateral channel MOSFETs, MESFETs [3], MISFETs [4], nano-membrane FETs [5] and lateral FinFETs [6], vertical Schottky Barrier Diodes (SBDs) [7, 8], and deep-UV solar-blind photodetectors [9] have all been demonstrated using Ga<inf>2</inf>O<inf>3</inf>. Here, we report the first Ga<inf>2</inf>O<inf>3</inf> vertical power transistors with a breakdown voltage (BV) of 185 V.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"155 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115195563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"GaN vertical nanowire and fin power MISFETs","authors":"Zongyang Hu, Wenshen Li, K. Nomoto, M. Zhu, Xiang Gao, M. Pilla, D. Jena, H. Xing","doi":"10.1109/DRC.2017.7999511","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999511","url":null,"abstract":"GaN vertical power devices have many advantage over lateral device in device scaling, reliability and thermal management, etc. Traditional power transistors employ p-type pockets to achieve E-mode, RESURF and avalanche capabilities. However, this topology in GaN vertical power transistors has been challenging to implement [1] due to the difficulty to achieve selective area doping without compromising breakdown: p-type pockets in n-type regions or vice versa. The GaN UMOS-FETs or trench MOSFETs can be realized using epitaxial p-layers, however, suffer from low channel mobility in the inversion channel [2, 3]. Using n-type GaN only, depletion mode vertical MISFETs can be achieved with attractive current densities and breakdown voltages [4]. To get normally-off operation, Fin or nanowire (NW) pillars are necessary geometries. Compared with Fins, GaN nanowires have added advantages including superior electrostatic control and possibility for low-cost growth on foreign substrates [5, 6]. In this work, we report the first experimental demonstration of NW-MISFETs on bulk GaN substrates and compare them with Fin-MISFETs with the state-of-the-art performance fabricated on the same sample. The benefit of better electrostatic gate control in nanowire MISFETs are highlighted.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129962321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Extracting interface recombination velocities from double-heterojunction solar cell reverse-recovery characteristics","authors":"Alexander H. Berg, J. Sturm","doi":"10.1109/DRC.2017.7999506","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999506","url":null,"abstract":"Silicon double heterojunction (DH) solar cells represent a possible future path for high-efficiency, low-cost solar power. These cells forgo doped p-n and n+-n (or p+-p) homojunctions diffused at ∼900 °C in favor of < 200 °C-deposited selective heterojunction contacts, which block one type of carrier while allowing the other to pass freely[1]. One heterojunction injects minority carriers (blocking majority carriers), and the other blocks minority carriers to reduce dark current (Fig 1). The efficiency of these cells is highly dependent on the interface quality of their heterojunctions. To date there is no method that uses reverse recovery (RR) transients to extract the actual interface characteristics from finished devices — methods like pulsed photoconductivity used on test samples cannot be extended to final devices with 2 metallized interfaces. Here, we give a procedure for the independent extraction of interface parameters at both heterojunctions.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126680554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Increased blocking voltage in solution processed ZTO HVTFTs through drain offset","authors":"Christopher R. Allemang, R. L. Peterson","doi":"10.1109/DRC.2017.7999509","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999509","url":null,"abstract":"Solution processed Zn-Sn-O (ZTO) is an attractive amorphous oxide semiconductor (AOS) because solution processing does not require vacuum equipment enabling inexpensive large-area applications and ZTO has a higher mobility compared to amorphous silicon (a-Si) [1]. With a bandgap of ∼3eV, similar to that of GaN and SiC, amorphous oxide semiconductors may enable a new generation of thin film power devices, i.e. high voltage TFTs (HVTFTs) and rectifiers. Recent work has demonstrated HVTFTs supporting voltages of 80 to 100 V using vacuum deposited ZnO and IGZO with source and/or drain offsets [2]-[4]. In this work, we report the first solution processed ZTO HVTFTs able to support > 100 V by incorporation of a drain offset, and assess the impact of the drain offset on the device on-resistance.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"57 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126218088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"NbOx synaptic devices for spike frequency dependent plasticity learning","authors":"A. Rush, R. Jha","doi":"10.1109/DRC.2017.7999430","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999430","url":null,"abstract":"Niobium oxide (NbOx) has been extensively studied for application in resistive random access memory (ReRAM) and threshold switching devices [1]. While most of the previous work in this area has studied non-volatile states in NbOx, we report observations on time-dependent volatile states in NbOx for applications as synaptic devices in neuromorphic computing. The dynamic nature of NbOx is critical as it allows short-term potentiation (STP) and short-term depression (STD) behavior, which can serve as the basis for developing recurrent neural networks (RNN) and spike frequency dependent plasticity (SFDP)-based learning algorithms [2]. SFDP-based learning mechanism in neuro-synaptic arrays has potential to offer an alternative Hebbian learning solution to the more commonly implemented spike-timing dependent plasticity (STDP) based learning schemes. Unlike STDP learning scheme which relies on the relative timing between post-and pre-synaptic neurons and requires complex timing circuitry [3], SFPD relies on the input spike rate into presynaptic neurons to condition the synaptic plasticity. Here we report our observation on the input spike-frequency dependent reconfigurable resistive states in NbOx and retention of these states on various time-scales.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"269 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125826096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Characterization of β-Ga2O3 interface and conduction band offset with GaN using a Sol-gel process of deposition","authors":"Jianyi Gao, A. Kaya, R. Chopdekar, D. Dryden, Y. Takamura, M. Saif Islam, S. Chowdhury","doi":"10.1109/DRC.2017.7999447","DOIUrl":"https://doi.org/10.1109/DRC.2017.7999447","url":null,"abstract":"Significant efforts have been reported on oxide dielectrics on GaN and their role on device performance. It has been noted by several researchers [1, 2] that a few monolayers of native Ga<inf>2</inf>O<inf>3</inf> decorate the GaN surface due to the spontaneous termination of the Ga-atoms with Oxygen. In an attempt to characterize the quality of Ga<inf>2</inf>O<inf>3</inf> and GaN interfaces and evaluate its band offset on GaN, we have successfully deposited Ga<inf>2</inf>O<inf>3</inf> on GaN using a sol-gel process developed by Kaya et al. [3, 4]. In this work, we report successful deposition of the sol-gel process enabled thin-film of Ga<inf>2</inf>O<inf>3</inf> on n-type GaN with the assistance of photochemical reaction involving the exposure to the UV light. Interface-state density and conduction band offset between Ga<inf>2</inf>O<inf>3</inf> and GaN were characterized on Au/Al/Ga<inf>2</inf>O<inf>3</inf>/GaN MOS capacitors.","PeriodicalId":248087,"journal":{"name":"2017 75th Annual Device Research Conference (DRC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134214219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}