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2018 International Semiconductor Conference (CAS)最新文献

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Modeling of High Total Ionizing Dose (TID) Effects for Enclosed Layout Transistors in 65 nm Bulk CMOS 65nm CMOS封装封装晶体管高总电离剂量效应建模
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539806
Aristeidis Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, Loukas Chcvas, G. Borghello, H. D. Koch, F. Faccio
{"title":"Modeling of High Total Ionizing Dose (TID) Effects for Enclosed Layout Transistors in 65 nm Bulk CMOS","authors":"Aristeidis Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, Loukas Chcvas, G. Borghello, H. D. Koch, F. Faccio","doi":"10.1109/SMICND.2018.8539806","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539806","url":null,"abstract":"High doses of ionizing radiation drastically impair the electrical performance of CMOS technology. Enclosed gate layout remains an effective means to reduce this impact. Nevertheless, high total ionizing dose (TID) effects remain strong. The paper presents an effective approach to analytically model high TID effects in both NMOS and PMOS transistors with enclosed-gate layout in 65 nm commercial CMOS.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"16 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116851597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Session PS 会话PS
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/smicnd.2018.8539795
{"title":"Session PS","authors":"","doi":"10.1109/smicnd.2018.8539795","DOIUrl":"https://doi.org/10.1109/smicnd.2018.8539795","url":null,"abstract":"Plenary Sessions","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125872379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Second Harmonic Generation: A Non-Destructive Characterization Method for Dielectric-Semiconductor Interfaces 二次谐波的产生:介电-半导体界面的无损表征方法
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539758
I. Ionica, D. Damianos, A. Kaminski-Cachopo, A. Bouchard, X. Mescot, M. Gri, G. Grosa, S. Cristoloveanu, G. Vitrant, D. Blanc-Pélissier, M. Lei, J. Chanzala
{"title":"Second Harmonic Generation: A Non-Destructive Characterization Method for Dielectric-Semiconductor Interfaces","authors":"I. Ionica, D. Damianos, A. Kaminski-Cachopo, A. Bouchard, X. Mescot, M. Gri, G. Grosa, S. Cristoloveanu, G. Vitrant, D. Blanc-Pélissier, M. Lei, J. Chanzala","doi":"10.1109/SMICND.2018.8539758","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539758","url":null,"abstract":"This paper reviews the application of second harmonic generation (SHG) to characterize dielectric-semiconductor interfaces used in microelectronics and photovoltaics. Based on non-linear optics, the method is non-destructive, so particularly advantageous for thin films. The theoretical background shows the possibility to access the electric field at interfaces and consequently to have a non-destructive measurement for interface state densities or fixed charges in oxides. Two more detailed examples of application of SHG characterization will be shown: field-effect passivation of silicon using thin film deposited alumina and interface analysis of silicon-on-insulator substrates.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125036059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
International Semiconductor Conference (CAS) 2018 2018国际半导体大会(CAS
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/smicnd.2018.8539845
C. Dunare, J. Stevenson, A. Gundlach, A. Walton, W. Parkes
{"title":"International Semiconductor Conference (CAS) 2018","authors":"C. Dunare, J. Stevenson, A. Gundlach, A. Walton, W. Parkes","doi":"10.1109/smicnd.2018.8539845","DOIUrl":"https://doi.org/10.1109/smicnd.2018.8539845","url":null,"abstract":"International Semiconductor Conference (CAS) 2018","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129263699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Enhanced Photoconductivity of SIGE-Trilayer Stack by Retrenching Annealing Conditions 通过强化退火条件增强sige -三层堆叠的光电导率
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539775
M. T. Sultan, J. Gudmundsson, A. Manolescu, M. Ciurea, C. Palade, A. Maraloiu, H. Svavarsson
{"title":"Enhanced Photoconductivity of SIGE-Trilayer Stack by Retrenching Annealing Conditions","authors":"M. T. Sultan, J. Gudmundsson, A. Manolescu, M. Ciurea, C. Palade, A. Maraloiu, H. Svavarsson","doi":"10.1109/SMICND.2018.8539775","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539775","url":null,"abstract":"We studied the effect of short term furnace annealing over the photoconductive properties of tristacked layer i.e. TiO2/(SiGe/TiO2)3. The structure was prepared by depositing alternate layers of TiO2 and SiGe films, using direct-current magnetron sputtering technique. A transmission electron microscopy and grazing incidence spectroscopy was used to analyze the morphology of the structure. Photoconductive properties were studied by measuring photocurrent spectra at different applied voltages and temperatures. Tristack layers were obtained with 5–10 nm SiGe nanocrystals (NCs) by annealing at 600 °C for 5 min. No sign of SiO2 formation was found inside stacked layers. A maximum in the photocurrent spectra was observed at 994 nm at 300 K but it red-shifted gradually to 1045 nm with decrease in temperature to 100 K. This transition in peak maxima is attributed to SiGe NCs, due to lattice vibration and to contribution of non-radiative recombination at low temperatures.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129270448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Surface Recombination Evaluation in Bipolar Junction Transistors by Combined Electro-Optical Method 复合电光法评价双极结晶体管表面复合
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539746
V. Banu, J. Montserrat, X. Jordà, P. Godignon
{"title":"Surface Recombination Evaluation in Bipolar Junction Transistors by Combined Electro-Optical Method","authors":"V. Banu, J. Montserrat, X. Jordà, P. Godignon","doi":"10.1109/SMICND.2018.8539746","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539746","url":null,"abstract":"This paper describes an original method for very short minority carrier lifetime evaluation of semiconductor junctions that is aimed to be mainly used for the surface recombination studies of bipolar junction transistors made on silicon carbide, where an important surface recombination between base and emitter occurs. The presented method is based on combined electrooptical measurements and it was prior tested and calibrated using silicon bipolar transistors.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122310703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low-Temperature Packaging Methods as a Key Enablers for Microsystems Assembly and Integration 低温封装方法是微系统组装和集成的关键推动因素
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539847
S. Stoukatch, F. Dupont, M. Kraft
{"title":"Low-Temperature Packaging Methods as a Key Enablers for Microsystems Assembly and Integration","authors":"S. Stoukatch, F. Dupont, M. Kraft","doi":"10.1109/SMICND.2018.8539847","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539847","url":null,"abstract":"The paper reports on assembly and integration of MS (microsystems) into fully functional system. We show that among varieties of assembly techniques and methods commonly used for IC, some can be successfully used also for the assembly of microsystems. MS are specifically sensitive to thermal exposure that can occur during the assembly and integration process.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126098993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Design Aspects and Experimental Results on Broadband Monopole Dielectric Resonator Antenna 宽带单极介质谐振器天线的设计要点与实验结果
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539809
S. Simion, S. Iordanescu
{"title":"Design Aspects and Experimental Results on Broadband Monopole Dielectric Resonator Antenna","authors":"S. Simion, S. Iordanescu","doi":"10.1109/SMICND.2018.8539809","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539809","url":null,"abstract":"A configuration of broadband dielectric resonator (DR) based monopole antenna covering the whole X-frequency band is analyzed numerically, as well as experimentally. The analysis is performed for two cases: with and without PTFE covering the part of the monopole antenna which is extended above the DR. It is shown that the presence of the PTFE may improve the return loss of the antenna. Experimental results for the return loss and antenna directivity are presented, too.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116081850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Manufacture and Investigation of a Vertical MEMS Switch 垂直MEMS开关的制造与研究
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539774
A. Baracu, R. Müller, R. Voicu, A. Dinescu, M. Pustan, C. Bîrleanu
{"title":"Manufacture and Investigation of a Vertical MEMS Switch","authors":"A. Baracu, R. Müller, R. Voicu, A. Dinescu, M. Pustan, C. Bîrleanu","doi":"10.1109/SMICND.2018.8539774","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539774","url":null,"abstract":"This paper presents a switch with vertical movement, based on surface micromachining processes. The central thermal driving structure contains a suspended rectangular shape connected by 5 pairs of symmetric mobile beams. SEM investigations and COVENTOR simulations were performed in order to investigate the behavior of the switch.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131280722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparative Study of the Electrical Properties of CZTS-TiO2 and CZTS-ZnO Heterojunctions for PV Applications 光伏应用中CZTS-TiO2和CZTS-ZnO异质结电性能的比较研究
2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI: 10.1109/SMICND.2018.8539820
M. Covei, C. Bogatu, D. Perniu, S. Cisse, A. Duţă
{"title":"Comparative Study of the Electrical Properties of CZTS-TiO2 and CZTS-ZnO Heterojunctions for PV Applications","authors":"M. Covei, C. Bogatu, D. Perniu, S. Cisse, A. Duţă","doi":"10.1109/SMICND.2018.8539820","DOIUrl":"https://doi.org/10.1109/SMICND.2018.8539820","url":null,"abstract":"Two heterojunctions based on CU2ZnSnS4 were obtained as thin films, on FTO glass, by spray pyrolysis deposition. The choice of the n-type layer (TiO2 or ZnO) has impacted the nucleation and growth of the CZTS layers deposited on top. Crystalline thin films were obtained with drastically different morphologies. Small spherical grains promoted a better match at the interface between TiO2 and CZTS, while the hexagonal plates of ZnO promoted discontinuations. Both junctions proved photosensitive and gave good rectifying behavior but efficiencies lower than 0.01% suggest charge recombination at the interface or in the CZTS layer.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132607899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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