65nm CMOS封装封装晶体管高总电离剂量效应建模

2018 International Semiconductor Conference (CAS) Pub Date : 2018-10-01 DOI:10.1109/SMICND.2018.8539806

Aristeidis Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, Loukas Chcvas, G. Borghello, H. D. Koch, F. Faccio

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引用次数: 7

摘要

高剂量的电离辐射会严重损害CMOS技术的电学性能。封闭闸门的布置仍然是减少这种影响的有效手段。然而，高总电离剂量(TID)效应仍然很强。本文提出了一种有效的方法来解析模拟65nm商用CMOS中具有封闭栅极布局的NMOS和PMOS晶体管的高TID效应。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Modeling of High Total Ionizing Dose (TID) Effects for Enclosed Layout Transistors in 65 nm Bulk CMOS

High doses of ionizing radiation drastically impair the electrical performance of CMOS technology. Enclosed gate layout remains an effective means to reduce this impact. Nevertheless, high total ionizing dose (TID) effects remain strong. The paper presents an effective approach to analytically model high TID effects in both NMOS and PMOS transistors with enclosed-gate layout in 65 nm commercial CMOS.

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2018 International Semiconductor Conference (CAS)

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