ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference最新文献_第3页

An array of fully-integrated quadrature TX/RX NMR field probes for MRI trajectory mapping 一组用于MRI轨迹映射的完全集成的正交TX/RX核磁共振场探针

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598281

J. Handwerker, M. Eder, M. Tibiletti, V. Rasche, K. Scheffler, J. Becker, M. Ortmanns, J. Anders

引用次数: 16

A 65nm CMOS wideband TDD front-end with integrated T/R switching via PA re-use 一种65nm CMOS宽带TDD前端，通过PA复用集成T/R开关

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598272

Xiao Xiao, Amanda Pratt, A. Niknejad, E. Alon, B. Nikolić

引用次数: 3

An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology 采用65nm CMOS技术的8位0.7 gs /s单通道flash-SAR ADC

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598331

D. Muratore, Alper Akdikmen, E. Bonizzoni, F. Maloberti, U. Chio, Sai-Weng Sin, R. Martins

引用次数: 8

An 802.11a/b/g/n/ac WLAN Transceiver for 2×2 MIMO and simultaneous dual-band operation with +29 dBm Psat integrated power amplifiers 802.11a/b/g/n/ac WLAN收发器，用于2×2 MIMO和同时双频操作，带有+29 dBm Psat集成功率放大器

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598257

Shing-Tak Yan, Lu Ye, Hongbing Wu, R. Kulkarni, Edward Myers, H. Shih, Shadi Saberi, Darshan Kadia, Dizle Ozis, Lei Zhou, Eric Middleton, Joo Leong Tham

引用次数: 14

Data converter reflections: 19 papers from the last ten years that deserve a second look 数据转换器反思:过去十年的19篇论文值得重新审视

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598267

David Stuart Robertson, A. Buchwald, Michael J. Flynn, Hae-Seung Lee, U. Moon, B. Murmann

引用次数: 2

A ΣΔ sense chain using chopped integrators for ultra-low-noise MEMS system 超低噪音MEMS系统中使用切碎积分器的ΣΔ感测链

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598265

C. Fraisse, A. Nagari

引用次数: 2

UVFR: A Unified Voltage and Frequency Regulator with 500MHz/0.84V to 100KHz/0.27V operating range, 99.4% current efficiency and 27% supply guardband reduction UVFR:一个统一的电压和频率调节器，工作范围为500MHz/0.84V至100KHz/0.27V，电流效率99.4%，电源保护带减少27%

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598307

S. Gangopadhyay, Saad Bin Nasir, A. Subramanian, V. Sathe, A. Raychowdhury

引用次数: 14

An easily extendable FFT based four-channel, four-beam receiver with progressive partial spatial filtering in 65nm 一个易于扩展的基于FFT的四通道，四波束接收器，具有65nm的渐进部分空间滤波

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598316

Qingrui Meng, R. Harjani

{"title":"An easily extendable FFT based four-channel, four-beam receiver with progressive partial spatial filtering in 65nm","authors":"Qingrui Meng, R. Harjani","doi":"10.1109/ESSCIRC.2016.7598316","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2016.7598316","url":null,"abstract":"This paper presents a novel four-channel, four-beam receiver core based on a FFT core that is easily extended to a larger number of beams. This architecture is particulary well suited for MIMO systems where multiple beams are used for increased throughput. Like the FFT, the proposed architecture reuses computations for multi-beam systems. In particular, the proposed architecture redistributes the computations so as to maximize the reuse of the structure that already exist in a receiver chain. In many fashions the architecture is quite similar to a Butler matrix but unlike the Butler matrix it does not use large passive components at RF. Further, we exploit the normally occurring quadrature down-conversion process to implement the tap weights. In comparison to traditional MIMO architectures, that effectively duplicate each path, the distributed computations of this architecture provide partial spatial filtering before the final stage, improving interference rejection for the blocks between the LNA and the ADC. Additionally, because of the spatial filtering prior to the ADC, a single interferer only jams a single beam allowing for continued operation though at a lower combined throughput. The four-beam receiver core prototype in 65nm CMOS implements the basic FFT based architecture but does not include an LNA or extensive IF stages. This four-channel design consumes 56mW power and occupies an active area of 0.65mm2 excluding pads and test circuits.","PeriodicalId":246471,"journal":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122407072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Interference-induced DCO spur mitigation for digital phase locked loop in 65-nm CMOS 65纳米CMOS数字锁相环干扰诱导的DCO杂散抑制

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598280

C. Ho, M. Chen

引用次数: 4

A tunable gain and tunable band active balun LNA for IEEE 802.11ac WLAN receivers 用于IEEE 802.11ac WLAN接收器的可调谐增益和可调谐频带有源平衡LNA

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference Pub Date : 2016-09-01 DOI: 10.1109/ESSCIRC.2016.7598273

Suchendranath Popuri, V. Pasupureddi, J. Sturm

{"title":"A tunable gain and tunable band active balun LNA for IEEE 802.11ac WLAN receivers","authors":"Suchendranath Popuri, V. Pasupureddi, J. Sturm","doi":"10.1109/ESSCIRC.2016.7598273","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2016.7598273","url":null,"abstract":"A tunable gain and tunable band low-noise amplifier (LNA) for IEEE 802.11ac WLAN standard is proposed, with low noise figure and high linearity. The LNA is based on an active balun cascode topology with buffered negative feedback to achieve a differential signalling at the output. The unique feature of the proposed LNA includes highly linear, continuously tunable gain from 3 dB to 23 dB, in addition to a tunable frequency band from 4.5 GHz to 5.5 GHz, while meeting other critical LNA parameters such as noise figure and third order input inter-modulation point (IIP3). Tunable gain is achieved with the help of active CMOS resistors (ACR) at the core LNA load and also in the active negative feedback path, while tunable frequency band is achieved by a tunable LC tank load. The buffered negative feedback with cascode active balun provides the low noise figure and competitive IIP3. The LNA is implemented in 1.2V, 65nm CMOS technology. Measured LNA performance shows a noise figure of 2 dB and IIP3 of -6.5dBm at the highest gain of 23 dB and a noise figure of 6 dB and IIP3 of +10dBm at the lowest gain of 3 dB. The active chip area of the LNA is 0.043mm2 with a moderate power consumption of 16mW.","PeriodicalId":246471,"journal":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121235346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12