K. V. Arya, Gaurangi Upadhyay, Shambhavi Upadhyay, Shailendra Tiwari, Poonam Sharma
{"title":"Facial recognition using histogram of Gabor phase patterns and self organizing maps","authors":"K. V. Arya, Gaurangi Upadhyay, Shambhavi Upadhyay, Shailendra Tiwari, Poonam Sharma","doi":"10.1109/ICIINFS.2016.8263063","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263063","url":null,"abstract":"Automatic person identification using face information is very challenging task in the field of computer vision. A simple and efficient face recognition approach based on Gabor phase pattern and Self Organizing Maps is presented here. Histogram of Gabor Phase Pattern is used in proposed approach for feature extraction and Self Organizing maps are used as a classifier to identify whether the given grayscale image belongs to a particular class or not. In contrast to other feature extraction techniques, faster results are obtained using Histogram of Gabor Phase Patterns as feature detection occurs automatically without the need of any training procedure. A series of extensive experiments performed on various databases on MATLAB shows that proposed approach achieved a recognition rate of 97.33%, 96.49% and 94.20% for 7 consecutive trials on ORL, YALE and JAFFE databases respectively. It is demonstrated through experimental results that the proposed approach yields significant gain in terms of computational simplicity and effective accuracy.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127707612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Single depth image super-resolution via high-frequency subbands enhancement and bilateral filtering","authors":"Chandra Shaker Balure, M. R. Kini, A. Bhavsar","doi":"10.1109/ICIINFS.2016.8262996","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262996","url":null,"abstract":"This paper addresses the problem of super-resolution (SR) from a single low-resolution (LR) depth image to a high-resolution (HR) depth image. A simple yet effective method has been proposed using Discrete Wavelet Transform (DWT), Stationary Wavelet Transform (SWT), and by utilizing the gradient information of the interpolated LR image. We propose an intermediate stage to enhance the high-frequency subbands to recover the HR image for both noiseless and noisy scenarios. The proposed method has been validated on Middlebury dataset for different upsampling factors (i.e. 2, 4, 8) and is shown to be superior when compared with some related DWT and SWT based SR methods. We also demonstrate encouraging performance of the approach on noisy depth images.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128149368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new technique to enhance the impedance bandwidth of CDRA using drilling holes","authors":"R. Chowdhury, Rajkishor Kumar, R. Chaudhary","doi":"10.1109/ICIINFS.2016.8262947","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262947","url":null,"abstract":"A new technique has been shown to enhance the bandwidth of a simple cylindrical dielectric resonator antenna (CDRA) using drilling holes. Firstly, studies have been carried out on simple CDRA which shows an impedance bandwidth of 53.8%. The bandwidth enhancement is due to the combination of HEMna and HEMm. Further, analysis has been done by drilling holes at different locations in same CDRA. Finally, the same CDRA with three holes simultaneously shows an impedance bandwidth of 70.70%.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131460909","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Akshay Bhaskar, D. Reddy, S. Saravanan, K. J. Naidu
{"title":"A low power and high speed 10 transistor full adder using multi threshold technique","authors":"Akshay Bhaskar, D. Reddy, S. Saravanan, K. J. Naidu","doi":"10.1109/ICIINFS.2016.8262968","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262968","url":null,"abstract":"An adder is one of the main components in many digital devices, DSP processors, etc. Leakage power reduction and area have become important factors in designing recent VLSI circuits. As the technology is constantly scaling down, threshold voltage of transistors is also reduced, thereby making the static power dissipation high. In this paper a low power 10T full adder is designed in 45 nm complementary pass transistor technology. Power dissipation and delay are compared with the conventional 28 transistor full adder, proposed 10 transistor full adder, Multi Threshold CMOS (MTCMOS) based 28 transistor full adder and proposed Multi Threshold based 10 transistor full adder. Compared to the conventional 28 transistor full adder, the proposed design shows power dissipation is reduced by 99.528% and Power Delay Product (PDP) by 99.913%. The proposed circuit reduces the area used by 64% accompanied with high speed of operation.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134450761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fractional order PID control for LFC problem of a hydro-thermal power system","authors":"Pretty Neelam Topno, S. Chanana","doi":"10.1109/ICIINFS.2016.8263060","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263060","url":null,"abstract":"This paper presents a fractional order proportional integral derivative order controller, popularly known as FOPID controller for load frequency control problem of a two-area hydro-thermal power system. The objective of this study is to present a non-conventional way of robust control for the load frequency control problem. In this study, a performance index — Integral of absolute error has been used to formulate a cost function which is later minimized using differential evolution algorithm. The algorithm solves the optimization problem and determines the optimal value of parameters of FOPID controller. The FOPID controller has been tested under different operating conditions to verify its superiority over proportional integral (PI) controller. The system response obtained through simulation studies using FOPID controller has been compared with PI controller and the obtained response of system displays the effectiveness of FOPID control over PI control.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131799623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Estimation of stable FOPDT and SOPDT process using dual input describing function","authors":"K. V. Ramana, S. Majhi, A. Gogoi","doi":"10.1109/ICIINFS.2016.8263050","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263050","url":null,"abstract":"The process parameters for first-order-plus-dead-time (FOPDT) and second-order-plus-dead-time (SOPDT) stable processes are obtained using relay feedback test with the help of dual input describing function (DIDF). The limit cycle data is used to identify the unknown process parameters. This paper presents identification of stable FOPDT and SOPDT process for the cases with and without load disturbance. The relay settings are unchanged during load disturbance. The bias caused due to load is incorporated in the relay approximation using DIDF. This is used to obtain the parameters for both the cases. An on-line relay feedback test using a proportional integral and derivative (PID) controller is performed to obtain the unknown parameters.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131062872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low power and high performance multi-Vth dual mode logic design","authors":"Pavankumar Bikki, P. Karuppanan","doi":"10.1109/ICIINFS.2016.8262985","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262985","url":null,"abstract":"The unique feature of the dual mode logic (DML) model is its switching ability between static and dynamic modes of operation according to the system required. In dynamic mode, the DML model achieves high performance along with increased power dissipation, while in static mode DML models attain low power with moderate performance. In this paper, we analyzed DML model functioning in different regions to realize the trade-off between power and propagation delay. In addition, to that we have proposed the multi-threshold DML (MTDML) model. Its robustness to supply voltage and sensitivity to the process temperature variations are presented. Simulations are performed at 16 nm and 22 nm technologies using predictive technology model (PTM) files. Simulation results show that MTDML has reduced propagation delay and increased power dissipation at the low threshold voltage.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"28 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133663236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Priya Badera, S. K. Jain, Arun Parakh, Tarun Sharma
{"title":"Condition monitoring of pharmaceutical autoclave germs removal using Artificial Neural Network","authors":"Priya Badera, S. K. Jain, Arun Parakh, Tarun Sharma","doi":"10.1109/ICIINFS.2016.8263025","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263025","url":null,"abstract":"This paper presents a computer aided mythology for monitoring the performance of Autoclave Chamber used in pharmaceutical industry for removing germs of the medical equipments through sterilization. In order to accomplish that, an Artificial Neural Network (ANN) back propagation algorithm has been used. The artificial neural network (ANN) is trained with all the maximum possible samples of different pressure values, different temperature values of sensors, and different point's values of time. In order to demonstrate the success of proposed method, a group of 14 sensors (13 temperatures and one pressure) were fitted in the autoclave chamber and real time data of temperature and pressure were noted down. These data were used for the training the neural network. The developed ANN module was tested by the same kind of data i.e. numerical values of the temperature, and pressure. This ANN module gives the response in terms of pressure. This value is compared with pressure sensor actual value, in order to validate the methodology.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"12 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131327291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient technique for DC capacitor voltage balancing by using space vector modulated three-level STATCOM","authors":"K. Khatri, Y. Singh","doi":"10.1109/ICIINFS.2016.8263004","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263004","url":null,"abstract":"A space vector modulation (SVM) based maneuver for a three-level neutral point clamped (NPC) inverter that is habituated as a static synchronous compensator (STATCOM) is presented. The significant attribute of the proposed SVM switching maneuver is that it enables efficient control in the voltage balancing of the DC capacitors while compensating reactive power demand by the load in power system and initiating best voltage regulation with no prior auxiliary devices or any other controlling devices. In the proposed scheme, the most appropriate length of the vector is calculated for which reactive power exchange takes place while maintaining the balance between capacitor voltages. A dynamic model of three-level STATCOM and its performance is demonstrated in MATLAB/Simulink environment. The studies reveal the capabilities of the SVM based maneuver to maintain the capacitor voltages of the three-level NPC under various operating scenarios.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116960646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Baskey, D. Kumar, T. C. Shami, Rudresh Kumar, Sunil Kumar, A. Dixit, N. Prasad
{"title":"In-situ high-temperature electromagnetic characterization of ceramic composite tiles for strategic applications","authors":"H. Baskey, D. Kumar, T. C. Shami, Rudresh Kumar, Sunil Kumar, A. Dixit, N. Prasad","doi":"10.1109/ICIINFS.2016.8262955","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262955","url":null,"abstract":"In this paper free space microwave measurement setup has been integrated with the high temperature (HT) cell for the in-situ electromagnetic characterization. The experimental-setup is capable of operating in the frequency range from 5.85–40 GHz along with the in-situ material characterization from ambient to 1200°C. In this present work, experiment has been carried out for X band (8.2–12.4GHz) frequency region. The measurement system has been integrated with the dedicated software, which interfaces with the vector network analyzer and the temperature controller. In order to validate the experimental set-up, measurement is performed for the standard samples, after that the material under test is evaluated for characterization. Here the proposed integrated set-up has been used for testing of ceramic samples which are quite often used for application in defence strategic products. The proposed integrated set-up is ideally suited for electromagnetic characterization of day to day routine samples as well as as for various industrial applications.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124514773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}