Low power and high performance multi-Vth dual mode logic design

Pavankumar Bikki, P. Karuppanan
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引用次数: 4

Abstract

The unique feature of the dual mode logic (DML) model is its switching ability between static and dynamic modes of operation according to the system required. In dynamic mode, the DML model achieves high performance along with increased power dissipation, while in static mode DML models attain low power with moderate performance. In this paper, we analyzed DML model functioning in different regions to realize the trade-off between power and propagation delay. In addition, to that we have proposed the multi-threshold DML (MTDML) model. Its robustness to supply voltage and sensitivity to the process temperature variations are presented. Simulations are performed at 16 nm and 22 nm technologies using predictive technology model (PTM) files. Simulation results show that MTDML has reduced propagation delay and increased power dissipation at the low threshold voltage.
低功耗、高性能多v双模逻辑设计
双模逻辑(DML)模型的独特之处在于它能够根据系统需要在静态和动态运行模式之间切换。在动态模式下,DML模型实现了高性能,同时增加了功耗,而在静态模式下,DML模型实现了低功耗和中等性能。本文分析了DML模型在不同区域的功能,以实现功率和传播延迟之间的权衡。此外,我们还提出了多阈值DML (MTDML)模型。给出了其对电源电压的鲁棒性和对工艺温度变化的敏感性。使用预测技术模型(PTM)文件在16纳米和22纳米技术下进行了模拟。仿真结果表明,在低阈值电压下,MTDML降低了传输延迟,提高了功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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