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2008 IEEE International Conference on Electron Devices and Solid-State Circuits最新文献

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A slew-rate enhancement technique based on current comparator and capacitive-coupled push-pull output stage for CMOS amplifiers 基于电流比较器和电容耦合推挽输出级的CMOS放大器回转速率增强技术
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760633
P. Y. Or, K. Leung
{"title":"A slew-rate enhancement technique based on current comparator and capacitive-coupled push-pull output stage for CMOS amplifiers","authors":"P. Y. Or, K. Leung","doi":"10.1109/EDSSC.2008.4760633","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760633","url":null,"abstract":"A slew-rate enhanced single-stage amplifier using a current comparator and a capacitive-coupled push-pull output stage is introduced in this paper. This technique enables low-power consumption and fast transient response with automatic shut-off property. The idea is applied to a current-mirror amplifier design. Simulation results show that when compared to the design without the proposed method, the proposed idea can improve the slew rate by 7 times.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116990583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Threshold-voltage instability of polymer thin-film transistor under gate-bias and drain-bias stresses 栅极偏置和漏极偏置应力下聚合物薄膜晶体管的阈值电压不稳定性
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760739
Y. Liu, YU J.L., P. Lai, Z. X. Wang, J. Han, R. Liao
{"title":"Threshold-voltage instability of polymer thin-film transistor under gate-bias and drain-bias stresses","authors":"Y. Liu, YU J.L., P. Lai, Z. X. Wang, J. Han, R. Liao","doi":"10.1109/EDSSC.2008.4760739","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760739","url":null,"abstract":"Polymer thin-film transistors (PTFTs) based on MEH-PPV semiconductor are fabricated by spin-coating process and characterized. Gate-bias and drain-bias stress effects at room temperature are observed in the devices. The saturation current decreases and the threshold voltage shifts toward negative direction upon the gate-bias stress. However, the saturation current increases and the threshold voltage shifts toward positive direction upon the drain-bias stress. For variable bias stress conditions, carrier mobility is almost unchanged. The results suggest that the origin of threshold-voltage shift upon negative gate-bias stress is predominantly associated with holes trapped within the SiO2 gate dielectric or at the SiO2/Si interface due to hot-carrier emission under high gate-bias stress, while time-dependent charge trapping into the deep trap states in the channel region is responsible for the drain-bias stress effect in the PTFTs.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122073688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A white-light interferometric surface plasmon resonance sensor with wide dynamic range and phase-sensitive response 具有宽动态范围和相敏响应的白光干涉表面等离子体共振传感器
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760728
S. Ng, Shu-yuen Wu, H. Ho, Chi-Man Lawrence Wu
{"title":"A white-light interferometric surface plasmon resonance sensor with wide dynamic range and phase-sensitive response","authors":"S. Ng, Shu-yuen Wu, H. Ho, Chi-Man Lawrence Wu","doi":"10.1109/EDSSC.2008.4760728","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760728","url":null,"abstract":"The numerical simulation of a novel white-light interferometric surface plasmon resonance (WLISPR) sensor with high sensitivity and wide dynamic range is presented. It is perceived that the use of a broadband polychromatic source might effectively enable wide dynamic surface plasmon detection scheme and at the same time achieving comparable phase detection sensitivity to conventional laser-based surface plasmon resonance (SPR) configuration. As different from a single-point spectrally resolved approach using spectrometer, the purposed 2D imaging white-light interferometer can be integrated into typical Kretschmann SPR setup for ultra-fast throughput, making it possible for exceedingly sensitive bio-sensing application.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"204 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126081321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology GaAs pHEMT氧化镧栅介质膜的结构和电学特性
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760647
Wan-cheng Tsai, Chao-Hung Chen, H. Chiu, J. Fu
{"title":"Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology","authors":"Wan-cheng Tsai, Chao-Hung Chen, H. Chiu, J. Fu","doi":"10.1109/EDSSC.2008.4760647","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760647","url":null,"abstract":"In this study, a high dielectric constant lanthanum oxide thin film (La2O3) was fabricated as a gate dielectric on GaAs pHEMTs to reduce the effect of the gate leakage caused by continuing the constant field-scaling trend of MOS technology. The chemical compositions and the crystalline structure at different annealing temperatures were observed by X-ray photoelectron spectroscopy (XPS) and x-ray diffraction (XRD) respectively, and the results reveal its significant thermal stability. By fabricating the capacitor, the dielectric constant of La2O3 with annealing at 400square was calculated to be 21.6 which is higher than the sample without annealing. In addition, transistors with two different gate materials were successfully fabricated, Pt/La2O3/Ti/Au gate and the conventional Pt/Ti/Au gate. The DC results shown the oxide-device performed higher turn-on and breakdown voltage, exhibited better RF characteristic, and the gate leakage current was at least one order lower than the conventional device. Therefore, La2O3 is a potential candidate high-k material as the gate dielectric which can enhance the performance while scaling down the device dimension and overcome the thermal effect applied for high power applications.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127513344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A charge-based compact model for arbitrary doped cylindrical surrounding-gate MOSFETs 任意掺杂圆柱型围栅mosfet的电荷紧凑模型
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760654
Feilong Liu, Jian Zhang, F. He, Feng Liu, Lining Zhang, M. Chan
{"title":"A charge-based compact model for arbitrary doped cylindrical surrounding-gate MOSFETs","authors":"Feilong Liu, Jian Zhang, F. He, Feng Liu, Lining Zhang, M. Chan","doi":"10.1109/EDSSC.2008.4760654","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760654","url":null,"abstract":"This paper presents a charge-based compact model for the arbitrary doped long-channel cylindrical surrounding-gate (SRG) MOSFETs. Starting from Poissonpsilas equation with fixed charge and inversion charge terms, an accurate equation of inversion charge is obtained with the full-depletion approximation. Substituting this inversion charge expression into Pao-Sahpsilas dual integral, a drain current expression with concise form is derived. Based on the Ward-Duttonpsilas linear-charge-partition method and the current continuity principle, all trans-capacitances are obtained analytically. The developed model is valid in all operation regions without any smooth function. The model predictions have been extensively verified by 3D numerical simulations with a wide range of geometrical parameters and channel doping concentrations.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"2015 24","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134475710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Hardware design for accelerating PNG decode 加速PNG解码的硬件设计
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760652
Shizhen Huang, Tianyi Zheng
{"title":"Hardware design for accelerating PNG decode","authors":"Shizhen Huang, Tianyi Zheng","doi":"10.1109/EDSSC.2008.4760652","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760652","url":null,"abstract":"This paper discusses a hardware accelerated implementation for PNG image decoding within LZ77 and Huffman compression algorithm without any distortion, while compare with software decoding, parallel processing is the most significant feature of high efficiency. This design utilize cooperating of software and hardware to solve the problem of controlling hardware decoder, extend Deflate algorithm of Huffman tree to achieve fast look up, so it can improve decode efficiency with lower power consume.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129262429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Multipath reversed nested Miller compensation with voltage buffer for low-power three-stage amplifiers 多径反向嵌套米勒补偿与电压缓冲器的低功率三级放大器
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760676
Zushu Yan
{"title":"Multipath reversed nested Miller compensation with voltage buffer for low-power three-stage amplifiers","authors":"Zushu Yan","doi":"10.1109/EDSSC.2008.4760676","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760676","url":null,"abstract":"A multipath reversed nested Miller compensation (MRNMC) scheme with voltage buffer (MRNMCVB) is presented in this paper. By using an efficient voltage buffer, a low-voltage, low-power, three-stage RNMC amplifier topology suitable for large capacitive load applications is constructed with a noninverting intermediate stage. Moreover, the internal feedback loop introduced by the buffer prevents the reduction in high-frequency gain and extends the bandwidth of the amplifier significantly. Furthermore, a multipath feedforward stage is added to generate a left-half-plane (LHP) zero, which improves the stability of the amplifier and reduces the size of compensation capacitors simultaneously. An optimized MRNMCVB amplifier has been implemented in a 0.35-mum CMOS process. The amplifier driving a 500-pF load capacitor achieves 1.76-MHz unity-gain frequency (UGF), 59deg phase margin, and 0.88-V/mus average slew rate, while dissipating only 45-muW power at a 1.5-V supply. The total capacitor value is just 2.92-pF.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128638687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
High critical electric field of thin silicon film and its realization in SOI high voltage devices 硅薄膜的高临界电场及其在SOI高压器件中的实现
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760648
Shengdong Hu, Bo Zhang, Zhaoji Li
{"title":"High critical electric field of thin silicon film and its realization in SOI high voltage devices","authors":"Shengdong Hu, Bo Zhang, Zhaoji Li","doi":"10.1109/EDSSC.2008.4760648","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760648","url":null,"abstract":"Taking threshold energy epsiv<sub>T</sub> into accounting for electron multiplying, the formula of silicon critical electric field E<sub>S,C</sub> is given as a function of silicon film thickness t<sub>s</sub> from an effective ionization rate alpha<sub>eff</sub>. E<sub>S,C</sub> is increasing with the decreasing of t<sub>s</sub> especially at thinner t<sub>s</sub>. 2-D simulative and some experimental results as well as the comparing with several other familiar expressions of electric field proved the proposed E<sub>S,C</sub> is valid for both thick and thin silicon film. Thin silicon film with high E<sub>S,C</sub> can be used to enhance dielectric field E<sub>I</sub> and increase vertical breakdown voltage V<sub>B,V</sub> of SOI high voltage devices. A high voltage SOI device with 80 nm silicon layer and 0.4mum dielectric layer is designed. A high E<sub>S,C</sub> of 134V/mum is obtained, which makes E<sub>I</sub> and V<sub>B,V</sub> reach to 416 V/mum and 178 V, respectively.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132056501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Impact of stochastic mismatch on FinFETs SRAM cell induced by process variation 工艺变化对随机失配对finfet SRAM电池的影响
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760701
Shimeng Yu, Yuning Zhao, G. Du, Jinfeng Kang, R. Han, Xiaoyan Liu
{"title":"Impact of stochastic mismatch on FinFETs SRAM cell induced by process variation","authors":"Shimeng Yu, Yuning Zhao, G. Du, Jinfeng Kang, R. Han, Xiaoyan Liu","doi":"10.1109/EDSSC.2008.4760701","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760701","url":null,"abstract":"3-D mixed-mode device-circuit simulation is presented to investigate stochastic mismatch of FinFETs SRAM cell induced by process variation including fin-thickness and gate length variation as well as fin line edge roughness (LER). In this work, 20 nm FinFETs SRAMpsilas sensitivity of read and write static noise margin (SNM) to process variation is evaluated. The worst cases of read and write SNM under the influence of process variation are summarized. The results show that FinFETs SRAMpsilas stability is most sensitive to the access transistorpsilas fin-thickness variation. Under the worst cases, increasing the pull-down transistorpsilas fin-number may improve read SNM. The fin LER can cause aggressive fluctuations of the butterfly-curves and impose a big challenge on robust FinFETs SRAM design. Adopting 8T cell instead of 6T cell can alleviate the fin LER effect on read stability.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128162382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A vertically supported ring-type mems gyroscope utilizing electromagnetic actuation and sensing 一种利用电磁驱动和感应的垂直支撑环形mems陀螺仪
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760713
C. Yeh, J.J. Tsai, R. Shieh, F. Tseng, C. Li, Y. Su
{"title":"A vertically supported ring-type mems gyroscope utilizing electromagnetic actuation and sensing","authors":"C. Yeh, J.J. Tsai, R. Shieh, F. Tseng, C. Li, Y. Su","doi":"10.1109/EDSSC.2008.4760713","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760713","url":null,"abstract":"In this paper, we present the design and fabrication of a ring-type MEMS gyroscope, which is composed of a soft polymer-structure and 8 separate driving and sensing coils. The bottom side of the ring structure is mounted, while the upper portion vibrated freely by the actuation of electromagnetic and inertial forces. For the prototype demonstration, a polymer molding, metal printing, and multilayer packaging process is developed. Realized by the highly flexible structure, the device is expected to greatly amplify the vibratory motion and therefore the resulting output signal. As such, the proposed device could be low cost and readily serve as a motion detector for a variety of applications.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"207 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132036353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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