High critical electric field of thin silicon film and its realization in SOI high voltage devices

Shengdong Hu, Bo Zhang, Zhaoji Li
{"title":"High critical electric field of thin silicon film and its realization in SOI high voltage devices","authors":"Shengdong Hu, Bo Zhang, Zhaoji Li","doi":"10.1109/EDSSC.2008.4760648","DOIUrl":null,"url":null,"abstract":"Taking threshold energy epsiv<sub>T</sub> into accounting for electron multiplying, the formula of silicon critical electric field E<sub>S,C</sub> is given as a function of silicon film thickness t<sub>s</sub> from an effective ionization rate alpha<sub>eff</sub>. E<sub>S,C</sub> is increasing with the decreasing of t<sub>s</sub> especially at thinner t<sub>s</sub>. 2-D simulative and some experimental results as well as the comparing with several other familiar expressions of electric field proved the proposed E<sub>S,C</sub> is valid for both thick and thin silicon film. Thin silicon film with high E<sub>S,C</sub> can be used to enhance dielectric field E<sub>I</sub> and increase vertical breakdown voltage V<sub>B,V</sub> of SOI high voltage devices. A high voltage SOI device with 80 nm silicon layer and 0.4mum dielectric layer is designed. A high E<sub>S,C</sub> of 134V/mum is obtained, which makes E<sub>I</sub> and V<sub>B,V</sub> reach to 416 V/mum and 178 V, respectively.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2008.4760648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

Taking threshold energy epsivT into accounting for electron multiplying, the formula of silicon critical electric field ES,C is given as a function of silicon film thickness ts from an effective ionization rate alphaeff. ES,C is increasing with the decreasing of ts especially at thinner ts. 2-D simulative and some experimental results as well as the comparing with several other familiar expressions of electric field proved the proposed ES,C is valid for both thick and thin silicon film. Thin silicon film with high ES,C can be used to enhance dielectric field EI and increase vertical breakdown voltage VB,V of SOI high voltage devices. A high voltage SOI device with 80 nm silicon layer and 0.4mum dielectric layer is designed. A high ES,C of 134V/mum is obtained, which makes EI and VB,V reach to 416 V/mum and 178 V, respectively.
硅薄膜的高临界电场及其在SOI高压器件中的实现
考虑到电子倍增的阈值能量epsiv,从有效电离率alpha,给出了硅临界电场ES,C随硅膜厚度ts的函数表达式。ES,C随ts的减小而增大,特别是在较薄的ts下。二维模拟和一些实验结果以及与其他几种熟悉的电场表达式的比较证明了所提出的ES,C对厚、薄硅膜都是有效的。具有高ES、C的硅薄膜可用于提高SOI高压器件的介电场EI和垂直击穿电压VB、V。设计了一种80 nm硅层和0.4 ma介电层的高压SOI器件。获得了134V/mum的高ES,C,使EI和VB,V分别达到416 V/mum和178 V。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信
小红书