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1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)最新文献

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On multilevel circuit partitioning 关于多电平电路划分
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289078
Sverre Wichlund
{"title":"On multilevel circuit partitioning","authors":"Sverre Wichlund","doi":"10.1145/288548.289078","DOIUrl":"https://doi.org/10.1145/288548.289078","url":null,"abstract":"Multilevel partitioning approaches for circuit partitioning has been shown to be powerful (J. Cong and M. Smith, 1993; C.J. Alpert et al., 1996; 1997). We improve the excellent multilevel partitioning algorithm by C.J. Alpert et al. (1997) by taking edge frequency information (G. von Laszweski, 1993) into account during coarsening/uncoarsening, and to break ties. In addition, the uncoarsening phase is guided by an adaptive scheme which adds flexibility to the number of levels in the uncoarsening phase. We apply our algorithm to 13 benchmark circuits and achieve an improvement in min-cut and average min-cut values of up to 8.6% and 34.6% respectively, compared to the method by Alpert et al., at no extra runtime. Furthermore, our algorithm provides results of very stable quality. This positions our algorithm as current state of the art in multilevel circuit partitioning.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116752521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A performance-driven layer assignment algorithm for multiple interconnect trees 一种性能驱动的多互连树层分配算法
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.288589
Prashant Saxena, C. L. Liu
{"title":"A performance-driven layer assignment algorithm for multiple interconnect trees","authors":"Prashant Saxena, C. L. Liu","doi":"10.1145/288548.288589","DOIUrl":"https://doi.org/10.1145/288548.288589","url":null,"abstract":"With the advent of DSM technologies, interconnect delays increasingly overshadow the transistor delays. Furthermore, since the electrical characteristics of different layers in multilayer routing technologies vary widely, the assignment of the interconnect tree edges to specific routing layers has a large impact on the interconnect delays. Traditionally, critical global interconnect trees were routed greedily, one at a time. This caused the \"good\" layers to be used up largely for the first few trees, yielding poor routings for the remaining trees. Multiple passes with different tree orderings were usually used to remedy the situation, although with limited success. We propose the use of dynamically adjusted area quotas to prevent the first few trees from monopolizing the \"good\" layers. Our approach is independent of the routing model or the router employed, and reduces the maximum tree delays by around 15% as compared to traditional algorithms.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125803445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Adaptive variable reordering for symbolic model checking 符号模型检查的自适应变量重排序
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289054
Gila Kamhi, L. Fix
{"title":"Adaptive variable reordering for symbolic model checking","authors":"Gila Kamhi, L. Fix","doi":"10.1145/288548.289054","DOIUrl":"https://doi.org/10.1145/288548.289054","url":null,"abstract":"In this paper, we present an adaptive dynamic variable ordering paradigm which is application-dependent and intended for symbolic model checking applications. The impact of the adaptive variable reordering approach is demonstrated on circuits from Intel's next-generation micro-processors. On large circuits, in particular, our algorithms make verification tasks that would never end finish successfully in a reasonable amount of time. Our approach, to the best of our knowledge, pioneers in applying successfully ROBDD-independent and application-specific heuristics to the domain of dynamic variable reordering.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122357979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Intellectual property protection by watermarking combinational logic synthesis solutions 知识产权保护的水印组合逻辑综合解决方案
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.288609
D. Kirovski, Yean-Yow Hwang, M. Potkonjak, J. Cong
{"title":"Intellectual property protection by watermarking combinational logic synthesis solutions","authors":"D. Kirovski, Yean-Yow Hwang, M. Potkonjak, J. Cong","doi":"10.1145/288548.288609","DOIUrl":"https://doi.org/10.1145/288548.288609","url":null,"abstract":"The intellectual property business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and intellectual property fraud. We propose a new method for intellectual property protection which facilitates design watermarking at the combinational logic synthesis level. We developed protocols for embedding designer- and/or tool-specific information into a logic network while performing multi-level logic minimization and technology mapping. We demonstrate that the difficulty of erasing an author's signature or finding another signature in the synthesized design can be made arbitrarily computationally difficult. We also developed a statistical method which enables us to establish the strength of the proof of authorship. The watermarking method has been tested on a standard set of real-life benchmarks where an exceptionally high probability of authorship has been achieved with a negligible overhead in solution quality.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130877931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 85
Core integration: overview and challenges 核心集成:概述和挑战
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289069
Enno Wein
{"title":"Core integration: overview and challenges","authors":"Enno Wein","doi":"10.1145/288548.289069","DOIUrl":"https://doi.org/10.1145/288548.289069","url":null,"abstract":"The article addresses various issues that always arise whenever a system-on-a-chip is realized by combining predefined entities to a whole. In this context it does not make a difference whether these parts have been designed independently of the current project earlier in time or by different developers or companies, whether the intellectual property has been acquired or researched or whether the part is being designed in parallel with the complete system.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133700673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Word-level decision diagrams, WLCDs and division 字级决策图，wlcd和划分
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289114
Christoph Scholl, B. Becker, Thomas M. Weis
{"title":"Word-level decision diagrams, WLCDs and division","authors":"Christoph Scholl, B. Becker, Thomas M. Weis","doi":"10.1145/288548.289114","DOIUrl":"https://doi.org/10.1145/288548.289114","url":null,"abstract":"Several types of decision diagrams (DDs) have been proposed for the verification of integrated circuits. Recently, word-level DDs like BMDs, *BMDs, HDDs, K*BMDs and *PHDDs have been attracting more and more interest, e.g., by using *BMDs and *PHDDs it was for the first time possible to formally verify integer multipliers and floating point multipliers of \"significant\" bitlengths, respectively. On the other hand, it has been unknown, whether division, the operation inverse to multiplication can be efficiently represented by some type of word-level DDs. We show that the representational power of any word-level DD is too weak to efficiently represent integer division. Thus, neither a clever choice of the variable ordering, the decomposition type or the edge weights, can lead to a polynomial DD size for division. For the proof we introduce word-level linear combination diagrams (WLCDs), a DD, which may be viewed as a \"generic\" word-level DD. We derive an exponential lower bound on the WLCD representation size for integer dividers and show how this bound transfers to all other word-level DDs.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134040911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 44
Multipoint moment matching model for multiport distributed interconnect networks 多端口分布式互连网络的多点力矩匹配模型
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.288565
Qingjian Yu, Janet Roveda, E. Kuh
{"title":"Multipoint moment matching model for multiport distributed interconnect networks","authors":"Qingjian Yu, Janet Roveda, E. Kuh","doi":"10.1145/288548.288565","DOIUrl":"https://doi.org/10.1145/288548.288565","url":null,"abstract":"We provide a multipoint moment matching model for multiport distributed interconnect networks. We introduce a new concept: integrated congruence transform which can be applied to the partial differential equations of a distributed line and generate a passive finite order system as its model. Moreover, we also provide an efficient algorithm based on the L/sup 2/ Hilbert space theory so that exact moment matching at multiple points can be obtained.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131633713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Static compaction using overlapped restoration and segment pruning 静态压缩使用重叠恢复和片段修剪
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.288592
S. Bommu, S. Chakradhar, K. B. Doreswamy
{"title":"Static compaction using overlapped restoration and segment pruning","authors":"S. Bommu, S. Chakradhar, K. B. Doreswamy","doi":"10.1145/288548.288592","DOIUrl":"https://doi.org/10.1145/288548.288592","url":null,"abstract":"We propose a new technique for static compaction of test sequences. Our method is based on two key ideas: (1) overlapped vector restoration, and (2) identification, pruning, and re-ordering of segments. Overlapped restoration provides a significant computational advantage for large circuits. Segments partition the compaction problem into sub-problems. Segments are identified, dynamically pruned and re-ordered to achieve further compaction and speed up. When compared to the fastest method proposed by I. Pomeranz and S.M. Reddy (1997), our method was 5 to 30 times faster on ISCAS circuits and 20 to 50 times faster on large, industrial designs. The new algorithm was able to successfully process large industrial designs that could not be handled by earlier techniques in 2 CPU days.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122459270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 38
Estimation of power sensitivity in sequential circuits with power macromodeling application 基于功率宏建模的顺序电路功率灵敏度估计
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289072
Zhanping Chen, K. Roy, Edwin K. P. Chong
{"title":"Estimation of power sensitivity in sequential circuits with power macromodeling application","authors":"Zhanping Chen, K. Roy, Edwin K. P. Chong","doi":"10.1145/288548.289072","DOIUrl":"https://doi.org/10.1145/288548.289072","url":null,"abstract":"We propose a novel technique based on Markov chains to accurately estimate power sensitivities to primary inputs in CMOS sequential circuits. The power sensitivity defines the change in average power dissipation due to changes in the input signal specification. Such sensitivities are estimated as by-products of the average power estimation, leading to an efficient implementation. A key application of power sensitivities is to construct a power surface in the specification space so that power dissipation under any distribution of primary inputs can easily be obtained, thereby providing an effective power macromodel for high level power estimation. We demonstrate that such a power surface can be approximated by only a limited number of representative points. This will dramatically reduce the CPU and memory requirements. Results on a large number of benchmark circuits have verified the feasibility and accuracy of this technique.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125940576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Efficient encoding for exact symbolic automata-based scheduling 有效编码精确的符号自动机为基础的调度
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) Pub Date : 1998-11-01 DOI: 10.1145/288548.289074
S. Haynal, F. Brewer
{"title":"Efficient encoding for exact symbolic automata-based scheduling","authors":"S. Haynal, F. Brewer","doi":"10.1145/288548.289074","DOIUrl":"https://doi.org/10.1145/288548.289074","url":null,"abstract":"This paper presents an efficient encoding and automaton construction which improves performance of automata-based scheduling techniques. The encoding preserves knowledge of what operations occurred previously but excludes when they occurred, allowing greater sharing among scheduling traces. The technique inherits all of the features of BDD-based control dominated scheduling including systematic speculation. Without conventional pruning, all schedules for several large samples are quickly constructed.","PeriodicalId":224802,"journal":{"name":"1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287)","volume":"2016 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114458723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
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