2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)最新文献_第4页

Hand pantomime apperception for robotic arm control 机械臂控制的手部手势统觉

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212777

T. V. Viyas, R. W. Baskar, N. S. Gabriel, A. Sanjive

引用次数: 2

Network resource management and control in inter-domain SDN 跨域SDN网络资源管理与控制

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212768

Parvathy Vijayan, R. Manju

引用次数: 0

A study of energy conserving adequate coverage protocol for maximizing the lifetime of wireless sensor network 最大化无线传感器网络寿命的节能充分覆盖协议研究

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212842

M. Yadav, A. K. Daniel

引用次数: 2

Heuristics prediction of olympic medals using machine learning 利用机器学习对奥运奖牌进行启发式预测

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212734

Chandrasegar Thirumalai, S. Monica, A. Vijayalakshmi

引用次数: 27

Design and interfacing of T/R modules with radar system through TR module controller using FPGA 利用FPGA实现雷达收发模块控制器与雷达收发模块的接口设计

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212803

N. Pallavi, P. Anjaneyulu, P. Natarajan, V. Mahendra, R. Karthik

引用次数: 3

Connectivity verification of zynq UltraScale+ MPSoC with TTC and WDT interrupts zynq UltraScale+ MPSoC与TTC和WDT中断的连通性验证

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212854

A. Rajani, P. Vijitha

{"title":"Connectivity verification of zynq UltraScale+ MPSoC with TTC and WDT interrupts","authors":"A. Rajani, P. Vijitha","doi":"10.1109/ICECA.2017.8212854","DOIUrl":"https://doi.org/10.1109/ICECA.2017.8212854","url":null,"abstract":"Connectivity verification is very important to validate every design and the primary objective of the verification of a design is to check the correctness and performance of the Register-transfer level design against the specification. The aim of the project is to check the connectivity correctness and performance between the modules of the design. Project includes to write checks in System Verilog language to check connectivity of processor subsystem in zynq Ultrascale+ MpSoC contains low power and full power domain. A System Verilog based verification environment is developed. Here Verification is categorized into the following: “Whole system bring up” which includes booting of each processor and able to do some basic transfers to local memory i.e. Clock settings and some basic operations at system level. “Connectivity checks” which include the basic transaction to all modules at system level and toggle all ports. “Basic Functional Verification” which includes, Data Flow, Data Integrity through the system, address decoding etc., of each module at system level. Here Verification is for the Watchdog Timer (WDT) and Triple Timer Counter (TTC) blocks using advanced extensible interface (AXI) bus and advanced peripheral bus (APB) which generates different interrupts helps to avoid system malfunctions.","PeriodicalId":222768,"journal":{"name":"2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127993981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Study the performance parameters of novel scale FINFET Device in nm Region 研究新型纳米尺度FINFET器件的性能参数

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8203720

S. M. Jagtap, Vittal J. Gond

{"title":"Study the performance parameters of novel scale FINFET Device in nm Region","authors":"S. M. Jagtap, Vittal J. Gond","doi":"10.1109/ICECA.2017.8203720","DOIUrl":"https://doi.org/10.1109/ICECA.2017.8203720","url":null,"abstract":"One of the major challenge with CMOS circuits with 22nm technology & beyond is to buried the issues of increasing in power dissipation of the circuits due to higher order effects & leakage current. The traditional transistor or MOSFET require significant amount of power so the circuit present on the chip will require a large amount of power due to presence of many transistors in the circuit on the chip. CMOS transistors are used for many analog & digital applications. According to Moore's law, the number of transistors in area should double every 18 months. To replace nano scale CMOS, dual gate MOSFET, trigate device called FINFET Used. FINFET permits to lengthening gate scaling beyond the traditional limits sustaining a subthreshold slope, better performance with bias voltage scaling, low loping concertation in the channel. This paper contains the details description of FINFET, its features, its overview, advantages, performance parameters, & prospects of improvements to make it universal for CMOS IC applications towards size, power & speed. This paper presents studies of fundamental physics of Fin Field Effect Transistor, & detail description about the MOSFET structure. This paper presents study Nano scale FINFET with improvement on short channel effect, sources of leakage currents, GIBL, Gate Induced Barrier Lowering, sub-threshold swing is explained.","PeriodicalId":222768,"journal":{"name":"2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121629407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Comprehensive traffic management system: Real-time traffic data analysis using RFID 综合交通管理系统:利用RFID进行实时交通数据分析

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212787

B. Meghana, S. Kumari, T. P. Pushphavathi

{"title":"Comprehensive traffic management system: Real-time traffic data analysis using RFID","authors":"B. Meghana, S. Kumari, T. P. Pushphavathi","doi":"10.1109/ICECA.2017.8212787","DOIUrl":"https://doi.org/10.1109/ICECA.2017.8212787","url":null,"abstract":"Traffic related problems include not just traffic congestion due to increase in vehicular density, but also difficulty for passage of emergency vehicles, violation of rules such as red signal jumps, vehicle breakdowns and accidents causing blockage of roads and loss of lives. Previously proposed systems for smart traffic management focus on vehicular density based traffic signal control and provision for emergency vehicle passage. The capability of such systems are limited to one or two focus areas and most systems are not cost effective for real time implementation. In order to build a smart city, a comprehensive system for traffic management needs to be built that addresses all traffic related issues, not just traffic congestion. In this paper, a Comprehensive Traffic Management System (CTMS) using Radio Frequency Identification (RFID) and analytics for real time implementation has been proposed. The system is both cost effective and easy to implement. The outcomes are dynamic traffic signal timers that operate based on vehicular density, deviation of vehicles at previous junctions in case of blockage, traffic signal control for passage of emergency vehicles, detecting red signal violations, detecting road accidents, vehicle breakdowns for providing immediate assistance and tracking of vehicles.","PeriodicalId":222768,"journal":{"name":"2017 International conference of Electronics, Communication and Aerospace Technology (ICECA)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131363045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 18

Heuristic investigation on two step model order reduction technique 两步模型降阶技术的启发式研究

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8212753

S. Jha, Aditya Kumar Sharma

引用次数: 0

Deployment of weighted guided filtering scheme to enhance digital video quality 采用加权制导滤波方案，提高数字视频质量

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) Pub Date : 2017-04-01 DOI: 10.1109/ICECA.2017.8203656

N. Bhaskar, T. S. Ganashree

引用次数: 0